Patents Assigned to INNOAXIS CO., LTD
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Patent number: 10755657Abstract: Disclosed are a data driver, a display, and a method of driving a display. The data driver for driving a data line which is a capacitive load having one end electrically connected to a unit pixel includes an energy retrieving unit configured to drive the data line by applying a voltage to the data line, and a data driving unit configured to finely tune a voltage and drive the data line with an end voltage. The energy retrieving unit retrieves energy charged up in the data line in stages by driving the data line with voltages from a start voltage to the end voltage through an intermediate voltage.Type: GrantFiled: February 26, 2016Date of Patent: August 25, 2020Assignee: INNOAXIS CO., LTDInventor: Hwi-Cheol Kim
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Patent number: 10419015Abstract: A digital-to-analog converter including a resistor string configured to provide a plurality of gradation voltages formed by receiving a top voltage at one end thereof and a bottom voltage at the other end; a plurality of pass transistors including a pass transistor having one end which is electrically connected to the resistor string and outputting any one among the plurality of gradation voltages; and a decoder configured to control the plurality of pass transistors. The plurality of the pass transistors are included in any one among a plurality of groups according to values of the gradation voltages, and the pass transistors included in the any one group are divided into a first group and a second group according to output gradation voltages, and pass transistors included in the first group and pass transistors included in the second group are different types of pass transistors.Type: GrantFiled: November 17, 2017Date of Patent: September 17, 2019Assignee: INNOAXIS CO., LTDInventor: Hwi-Cheol Kim
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Publication number: 20190279591Abstract: A display apparatus includes a first circuit configured to process a signal between a first top voltage and a first bottom voltage, a second circuit configured to process a signal between a second top voltage and a second bottom voltage, and a second circuit power source configured to receive a current provided by the first circuit and provide the second top voltage to the second circuit.Type: ApplicationFiled: January 25, 2019Publication date: September 12, 2019Applicants: INNOAXIS CO., LTD, Aconic Inc.Inventors: HWI-CHEOL KIM, Min Jae LEE
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Patent number: 10348324Abstract: A digital-to-analog converter including a resistor string configured to provide a plurality of gradation voltages formed by receiving a top voltage at one end thereof and a bottom voltage at the other end; a plurality of pass transistors including a pass transistor having one end which is electrically connected to the resistor string and outputting any one among the plurality of gradation voltages; and a decoder configured to control the plurality of pass transistors. The plurality of the pass transistors are included in any one among a plurality of groups according to values of the gradation voltages, and the pass transistors included in the any one group are divided into a first group and a second group according to output gradation voltages, and pass transistors included in the first group and pass transistors included in the second group are different types of pass transistors.Type: GrantFiled: November 17, 2017Date of Patent: July 9, 2019Assignee: INNOAXIS CO., LTDInventor: Hwi-Cheol Kim
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Patent number: 10235960Abstract: Provided are a source driver for receiving a digital signal and providing a grayscale signal corresponding to the digital signal and a display device for displaying content. The source driver includes an amplifier configured to provide a grayscale signal, a second driving switch configured to provide the grayscale signal provided by the amplifier to an output node or block the grayscale signal, and a first driving unit including a first switch whose one end is connected to a first voltage and whose other end is connected to the output node and a second switch whose one end is connected to a second voltage and whose other end is connected to the output node, and configured to first drive the output node. The output node is first driven by the first driving unit and then second driven by the amplifier with the grayscale signal.Type: GrantFiled: June 5, 2017Date of Patent: March 19, 2019Assignee: INNOAXIS CO., LTDInventor: Hwi-Cheol Kim
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Patent number: 9991903Abstract: A level shifter, a digital-to-analog converter (DAC), and a buffer amplifier, and a source driver and an electronic device including the same are provided. The source driver includes a level shifter configured to receive digital bits and provide a level-shifted output signal; a DAC including a resistor string configured to provide a plurality of gradation voltages formed by an upper limit voltage and a lower limit voltage being received through one end and the other end, and an N-type metal oxide semiconductor (NMOS) switch and a P-type MOS (PMOS) switch configured to be controlled by the level-shifted output signal and output a gradation voltage corresponding to the level-shifted output signal; and an amplifier configured to amplify a signal provided by the digital-to-analog converter, and the lower limit voltage is provided to a body electrode of the NMOS switch.Type: GrantFiled: September 13, 2017Date of Patent: June 5, 2018Assignee: INNOAXIS CO., LTDInventor: Hwi-Cheol Kim
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Patent number: 9985643Abstract: A level shifter, a digital-to-analog converter (DAC), and a buffer amplifier, and a source driver and an electronic device including the same are provided. The source driver includes a level shifter configured to receive digital bits and provide a level-shifted output signal; a DAC including a resistor string configured to provide a plurality of gradation voltages formed by an upper limit voltage and a lower limit voltage being received through one end and the other end, and an N-type metal oxide semiconductor (NMOS) switch and a P-type MOS (PMOS) switch configured to be controlled by the level-shifted output signal and output a gradation voltage corresponding to the level-shifted output signal; and an amplifier configured to amplify a signal provided by the digital-to-analog converter, and the lower limit voltage is provided to a body electrode of the NMOS switch.Type: GrantFiled: September 13, 2017Date of Patent: May 29, 2018Assignee: INNOAXIS CO., LTDInventor: Hwi-Cheol Kim
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Publication number: 20180102785Abstract: A digital-to-analog converter including a resistor string configured to provide a plurality of gradation voltages formed by receiving a top voltage at one end thereof and a bottom voltage at the other end; a plurality of pass transistors including a pass transistor having one end which is electrically connected to the resistor string and outputting any one among the plurality of gradation voltages; and a decoder configured to control the plurality of pass transistors. The plurality of the pass transistors are included in any one among a plurality of groups according to values of the gradation voltages, and the pass transistors included in the any one group are divided into a first group and a second group according to output gradation voltages, and pass transistors included in the first group and pass transistors included in the second group are different types of pass transistors.Type: ApplicationFiled: November 17, 2017Publication date: April 12, 2018Applicant: Innoaxis Co., LtdInventor: Hwi-Cheol KIM
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Publication number: 20180091168Abstract: A digital-to-analog converter including a resistor string configured to provide a plurality of gradation voltages formed by receiving a top voltage at one end thereof and a bottom voltage at the other end; a plurality of pass transistors including a pass transistor having one end which is electrically connected to the resistor string and outputting any one among the plurality of gradation voltages; and a decoder configured to control the plurality of pass transistors. The plurality of the pass transistors are included in any one among a plurality of groups according to values of the gradation voltages, and the pass transistors included in the any one group are divided into a first group and a second group according to output gradation voltages, and pass transistors included in the first group and pass transistors included in the second group are different types of pass transistors.Type: ApplicationFiled: November 17, 2017Publication date: March 29, 2018Applicant: INNOAXIS CO., LTDInventor: Hwi-Cheol KIM
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Publication number: 20180013444Abstract: A level shifter, a digital-to-analog converter (DAC), and a buffer amplifier, and a source driver and an electronic device including the same are provided. The source driver includes a level shifter configured to receive digital bits and provide a level-shifted output signal; a DAC including a resistor string configured to provide a plurality of gradation voltages formed by an upper limit voltage and a lower limit voltage being received through one end and the other end, and an N-type metal oxide semiconductor (NMOS) switch and a P-type MOS (PMOS) switch configured to be controlled by the level-shifted output signal and output a gradation voltage corresponding to the level-shifted output signal; and an amplifier configured to amplify a signal provided by the digital-to-analog converter, and the lower limit voltage is provided to a body electrode of the NMOS switch.Type: ApplicationFiled: September 13, 2017Publication date: January 11, 2018Applicant: INNOAXIS CO., LTDInventor: Hwi-Cheol KIM
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Publication number: 20180006660Abstract: A level shifter, a digital-to-analog converter (DAC), and a buffer amplifier, and a source driver and an electronic device including the same are provided. The source driver includes a level shifter configured to receive digital bits and provide a level-shifted output signal; a DAC including a resistor string configured to provide a plurality of gradation voltages formed by an upper limit voltage and a lower limit voltage being received through one end and the other end, and an N-type metal oxide semiconductor (NMOS) switch and a P-type MOS (PMOS) switch configured to be controlled by the level-shifted output signal and output a gradation voltage corresponding to the level-shifted output signal; and an amplifier configured to amplify a signal provided by the digital-to-analog converter, and the lower limit voltage is provided to a body electrode of the NMOS switch.Type: ApplicationFiled: September 13, 2017Publication date: January 4, 2018Applicant: INNOAXIS CO., LTDInventor: Hwi-Cheol KIM
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Publication number: 20170358269Abstract: Provided are a source driver for receiving a digital signal and providing a grayscale signal corresponding to the digital signal and a display device for displaying content. The source driver includes an amplifier configured to provide a grayscale signal, a second driving switch configured to provide the grayscale signal provided by the amplifier to an output node or block the grayscale signal, and a first driving unit including a first switch whose one end is connected to a first voltage and whose other end is connected to the output node and a second switch whose one end is connected to a second voltage and whose other end is connected to the output node, and configured to first drive the output node. The output node is first driven by the first driving unit and then second driven by the amplifier with the grayscale signal.Type: ApplicationFiled: June 5, 2017Publication date: December 14, 2017Applicant: INNOAXIS CO., LTDInventor: Hwi-Cheol KIM
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Patent number: 9825644Abstract: A digital-to-analog converter including a resistor string configured to provide a plurality of gradation voltages formed by receiving a top voltage at one end thereof and a bottom voltage at the other end; a plurality of pass transistors including a pass transistor having one end which is electrically connected to the resistor string and outputting any one among the plurality of gradation voltages; and a decoder configured to control the plurality of pass transistors. The plurality of the pass transistors are included in any one among a plurality of groups according to values of the gradation voltages, and the pass transistors included in the any one group are divided into a first group and a second group according to output gradation voltages, and pass transistors included in the first group and pass transistors included in the second group are different types of pass transistors.Type: GrantFiled: March 21, 2017Date of Patent: November 21, 2017Assignee: INNOAXIS CO., LTDInventor: Hwi-Cheol Kim
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Patent number: 9793916Abstract: A level shifter, a digital-to-analog converter (DAC), and a buffer amplifier, and a source driver and an electronic device including the same are provided. The source driver includes a level shifter configured to receive digital bits and provide a level-shifted output signal; a DAC including a resistor string configured to provide a plurality of gradation voltages formed by an upper limit voltage and a lower limit voltage being received through one end and the other end, and an N-type metal oxide semiconductor (NMOS) switch and a P-type MOS (PMOS) switch configured to be controlled by the level-shifted output signal and output a gradation voltage corresponding to the level-shifted output signal; and an amplifier configured to amplify a signal provided by the digital-to-analog converter, and the lower limit voltage is provided to a body electrode of the NMOS switch.Type: GrantFiled: March 21, 2017Date of Patent: October 17, 2017Assignee: INNOAXIS CO., LTDInventor: Hwi-Cheol Kim
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Publication number: 20170272093Abstract: A level shifter, a digital-to-analog converter (DAC), and a buffer amplifier, and a source driver and an electronic device including the same are provided. The source driver includes a level shifter configured to receive digital bits and provide a level-shifted output signal; a DAC including a resistor string configured to provide a plurality of gradation voltages formed by an upper limit voltage and a lower limit voltage being received through one end and the other end, and an N-type metal oxide semiconductor (NMOS) switch and a P-type MOS (PMOS) switch configured to be controlled by the level-shifted output signal and output a gradation voltage corresponding to the level-shifted output signal; and an amplifier configured to amplify a signal provided by the digital-to-analog converter, and the lower limit voltage is provided to a body electrode of the NMOS switch.Type: ApplicationFiled: March 21, 2017Publication date: September 21, 2017Applicant: INNOAXIS CO., LTDInventor: Hwi-Cheol KIM
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Publication number: 20170272092Abstract: A digital-to-analog converter including a resistor string configured to provide a plurality of gradation voltages formed by receiving a top voltage at one end thereof and a bottom voltage at the other end; a plurality of pass transistors including a pass transistor having one end which is electrically connected to the resistor string and outputting any one among the plurality of gradation voltages; and a decoder configured to control the plurality of pass transistors. The plurality of the pass transistors are included in any one among a plurality of groups according to values of the gradation voltages, and the pass transistors included in the any one group are divided into a first group and a second group according to output gradation voltages, and pass transistors included in the first group and pass transistors included in the second group are different types of pass transistors.Type: ApplicationFiled: March 21, 2017Publication date: September 21, 2017Applicant: INNOAXIS CO., LTDInventor: Hwi-Cheol KIM
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Publication number: 20160260384Abstract: Disclosed are a data driver, a display, and a method of driving a display. The data driver for driving a data line which is a capacitive load having one end electrically connected to a unit pixel includes an energy retrieving unit configured to drive the data line by applying a voltage to the data line, and a data driving unit configured to finely tune a voltage and drive the data line with an end voltage. The energy retrieving unit retrieves energy charged up in the data line in stages by driving the data line with voltages from a start voltage to the end voltage through an intermediate voltage.Type: ApplicationFiled: February 26, 2016Publication date: September 8, 2016Applicant: INNOAXIS CO., LTDInventor: Hwi-Cheol KIM