Abstract: A method for over current protection includes: when receiving an overcurrent signal that representing an output current of DC-DC conversion module exceeds a OCP value sent by a DC-DC conversion module, controlling a protection module to be disconnected, cutting off an external insertion apparatus, so that the on-board circuit is not powered off; keeping outputting a first enable signal to the DC-DC conversion module within third preset duration longer than first preset duration, and after the first preset duration, determining whether the overcurrent signal sent by the DC-DC conversion module is re-received; if yes, it indicates that overcurrent occurs in the on-board circuit portion, controlling the DC-DC conversion module to be turned off, to stop supplying power for the on-board circuit; if no, keeping controlling the protection module to be disconnected, and continuing to merely supply power to the on-board circuit.

Abstract: A Logical Unit Number (LUN) division method and device includes checking and adjusting a connection manner and numbers of Serial Attached Small Computer System Interface (SCSI) (SAS) connections of storage enclosures and a controller, so as to make a maximum output bandwidth of each storage enclosure consistent (Si); querying controller port identifiers and storage enclosure identifiers (S2); creating a Mdisk array, and adding the corresponding controller port identifier and the corresponding storage enclosure identifier for each Mdisk (S3); logically dividing a storage space in the Mdisk array to create a volume, and dividing the volume into LUNs, whereby Mdisks that form the LUNs are made to come from different storage enclosures and different controller ports (S4); and mapping the LUNs to a host (S5).

Abstract: Provided is a phase self-correction circuit, including a trigger signal operation module and a signal phase correction module. The trigger signal operation module and the signal phase correction module are both composed of a plurality of discrete components. The trigger signal operation module is configured to perform a logical operation on an input phase standard reference signal and actual transmission signal, to obtain a target trigger signal for triggering the signal phase correction module; and the signal phase correction module is configured to output, based on trigger modes of the target trigger signal and the actual transmission signal, a self-correction transmission signal with the same waveform as that of the phase standard reference signal, to realize phase self-correction on the actual transmission signal.

Abstract: A memory anomaly processing method and system, an electronic device, and a storage medium. The method includes: reading a memory error quantity of a target memory bank from a memory error register; when the memory error quantity is greater than a preset value, executing a hot-removal operation on the target memory bank; calculating a memory delay parameter, and writing the memory delay parameter into a memory controller, wherein the memory delay parameter is waiting time after the memory controller controls the target memory bank to receive a read/write command; and executing a hot-addition operation on the target memory bank, whereby the memory controller continues to execute a read/write operation on the target memory bank based on the memory delay parameter. It can be seen that, according to the present application, the memory read/write error rate may be reduced.

Abstract: The present disclosure discloses a network switching method and apparatus, an electronic device, and a computer-read-able storage medium, the method including: creating a smart monitor used for monitoring port changes; if the smart monitor monitors that a smart port for deploying a network is created, performing network deployment of a bare metal server (bms) node by using the smart port, wherein a smart network interface card is installed in the bms node, and the smart network interface card generates a first bare metal port at the bms node and generates a second bare metal port corresponding to the first bare metal port in an operating system of the smart network interface card; if the smart monitor monitors that a neutron port of a neutron network is updated, adding the second bare metal port into a network bridge of the bms node.

Abstract: A method and apparatus for improving message processing efficiency of a Flash channel controller are provided. The method includes: S1, after receiving a request message of a functional unit, a Flash interface parses the request message, and constructs a request response message according to a parsing result, wherein the request response message includes a state of the request message; S2, the Flash interface returns the request response message to the functional unit; and S3, the functional unit acquires the state of the request message according to the request response message, and makes, according to whether the state of the request message is normal, a response to the request message before receiving a completion message.

Abstract: An online takeover method for a heterogeneous storage volume, including: executing a service: a host executing upper layer service data access by means of a second volume label of a storage volume of a second storage; generating a volume label: a first storage taking over the storage volume of the second storage and generating a first volume label for the storage volume that has been taken over; flushing data: flushing host side cache data corresponding to the storage volume of the second storage to the storage volume of the second storage; changing a directory: changing directory information of an upper layer service running on the host; and storage migration: when the directory information of the upper layer service has been changed, migrating data of the storage volume to the first storage.

Abstract: A data processing method and system for a cloud platform, and an electronic apparatus and a storage medium. The data processing method includes: an acquisition rate of performance data of each data type in a cloud platform is determined (S101); according to the acquisition rate, a shard corresponding to each data type is determined (S102); a database mapping table according to correspondence relationships between shards and databases is generated (S103); and when a data operation request is received, according to the database mapping table, a target database corresponding to the data operation request is determined, and a corresponding operation in the target database is executed (S104). By using the above method, the load balancing of a cloud platform can be realized, and the data processing efficiency can be improved.

Abstract: A Platform Environment Control Interface (PECI) signal interconnection method and system for a server, a computer device and a readable storage medium are provided. The method includes: acquiring a partition mode of the server; sending a corresponding first control signal and a corresponding second control signal to each computing node according to the partition mode; controlling a channel selection of a first switch on the corresponding computing node by the corresponding first control signal and controlling a channel selection of a second switch on the corresponding computing node by the corresponding second control signal; and transmitting PECI signals of the corresponding computing node through channels connected by the first switch and channels connected by the second switch. According to the described solution, interconnection routing of the PECI signals in a single-partition mode and a dual-partition mode may be achieved by using only one backplate.

Abstract: A server Joint Test Action Group (JTAG) component adaptive interconnection system and method. The system includes a JTAG master device, a programmable device, and a plurality of JTAG components. The programmable device is configured to simulate JTAG timing according to a JTAG protocol and test JTAG channels of the JTAG components connected to the programmable device one by one. The programmable device connects in series a Test Data Output (TDO) signal of a previous JTAG component with a Test Data Input (TDI) signal of a next JTAG component in the programmable device, connects a TDI signal of a first JTAG component with a TDI signal of the JTAG master device, and connects a TDO signal of a last JTAG component with a TDO signal of the JTAG master device, so as to form a JTAG interconnection chain.

Abstract: A method and device for testing a conversion relationship between different reading manners in a flash memory chip and a readable storage medium are provided. Block reading is respectively performed, a bit error rate file is recorded, a test starting point, a test ending point and a test step length are is set in a block, the bit error rate file of the number of times of corresponding page reading is respectively recorded, and the number of times of page reading that is closest to the proportion of block error codes are found from the proportion of page error codes, a conversion of the number of times of block reading and the number of times of page reading is completed, conversion coefficients of the block reading and the page reading can be calculated for blocks in different states of a life cycle.

Abstract: A direct-current power supply parallel-machine input reverse connection prevention circuit and a server. The circuit comprises a first switch tube, second switch tube (Q2). A first end of the first switch tube is used for being connected to a positive end of a first power supply and a second end of the first switch tube is connected to a positive input end of a first driving module. A first end of the second switch tube is used for being connected to a positive end of a second power supply and a second end of the second switch tube is connected to a positive input end of a second driving module.

Abstract: A signal correction circuit and a server are provided. The circuit comprises: a first signal processing component receiving an input signal and positive power supply voltages and negative power supply voltages, generating a first control voltage, and outputting a first voltage, the first voltage being zero within a first time period; a second signal processing component generating a second control voltage according to the first control voltage, performing energy storage charging according to the second control voltage, controlling an energy storage charging voltage according to the second control voltage, and outputting a second voltage, and the second voltage being zero in the second time period; and an output component performing superposition processing on the first voltage and the second voltage to obtain an output signal.

Abstract: A key management method and a related device are provided. The method includes: receiving key generation request information; generating attribute access policy information on the basis of the key generation request information, the attribute access policy information being an attribute set for encrypting a data key; encrypting the data key on the basis of the attribute set for encrypting the data key; receiving key acquisition request information; on the basis of the attribute set for encrypting the data key, verifying whether attribute information of the key acquisition request information is included in the attribute set for encrypting the data key; and in response to the attribute information of the key acquisition request information being included in the attribute set for encrypting the data key, acquiring a destination data key on the basis of the attribute information of the key acquisition request information.

Abstract: A PCIe switch working mode updating method and apparatus, an electronic device, and a computer-readable storage medium, which are applied to a controller. The PCIe switch working mode updating method includes: determining a required switch firmware version of a system according to system configuration information; determining the current switch firmware version according to the current port definition state of a PCIe switch; determining, according to the required switch firmware version and the current switch firmware version, whether a switch port reallocation operation needs to be executed; and under the condition that the switch port reallocation operation needs to be executed, sending, to the PCIe switch, a data file corresponding to the required switch firmware version, so that the PCIe switch updates a working mode according to the data file.

Abstract: The disclosure provides a server cabinet, including: a cabinet frame, first mounting flanges detachably and vertically arranged at two sides of a front end of the cabinet frame, second mounting flanges detachably and vertically arranged at the two sides of the front end of the cabinet frame, first support brackets detachably arranged at the two side walls of the cabinet frame and configured for installing an ODCC server, and second support brackets detachably arranged at the two side walls of the cabinet frame and configured for installing an OCP server; wherein a plurality of first mounting holes configured for being matched with a front end of the ODCC server are formed in the first mounting flanges along a height direction, and a plurality of second mounting holes configured for being matched with a front end of the OCP server are formed in the second mounting flanges along the height direction.

Abstract: A task scheduling method includes: when a task requirement is obtained, splitting the task requirement to obtain the plurality of subtasks having a constraint relationship; performing execution condition detection on non-candidate subtasks, determining a non-candidate subtask that satisfies an execution condition as a candidate subtask, and putting the candidate subtask into a task queue; performing state detection on a server network composed of edge servers to obtain server state information and communication information; inputting the server state information, the communication information, and queue information corresponding to the task queue into an action value evaluation model to obtain the plurality of evaluated values respectively corresponding to the plurality of scheduling actions; and determining a target scheduling action from the plurality of scheduling actions by using the evaluated values, and scheduling the candidate subtask in the task queue on the basis of the target scheduling action.

Abstract: An image compression sampling method and assembly are provided. The method includes: performing sparse representation on a target image by using an initial sparse matrix, quantifying an initial sparse representation result to obtain an optimized sparse representation result, and obtaining an optimized sparse matrix; constructing a product matrix by using the optimized sparse matrix and an initial measurement matrix, and adjusting absolute values of off-diagonal elements in the product matrix to be less than a correlation threshold; performing singular value decomposition on the product matrix to obtain a diagonal matrix and a left singular matrix, and updating the diagonal matrix according to a quantity of samplings of the initial measurement matrix; and optimizing the initial measurement matrix by using the left singular matrix and the updated diagonal matrix to obtain an optimized measurement matrix, and collecting image data by using the optimized sparse matrix and the optimized measurement matrix.

Abstract: This application discloses a high-reliability protection circuit and a power supply system.

Abstract: Provided is a data processing method, which includes: in response to a logical volume receiving a write request, whether a logical address carried in the write request is occupied by a data unit in the logical volume is determined; if not, a data grain which is closest to the size of a data block and is greater than the size of the data block is determined; a new data unit is created in the logical volume by use of the logical address as an initial address and by use of the closest data grain as the length, and a logical address range occupied by the data block in the new data unit is recorded; the data block is written into an underlying storage and a written physical address is returned; and a mapping relationship between the initial address and the physical address is established and saved.