Patents Assigned to Institut Imeni V. I. Lenina
  • Patent number: 5016088
    Abstract: A unit of series-connected semiconductor elements includes a cylindrical metal case with a clamping mechanism enclosed therein. A chain of semiconductor elements is arranged between the surfaces of clamping elements of the clamping mechanism coaxially with the case. One extreme semiconductor element of the chain contacts the bottom of the case made of a current-conducting material, functioning as one clamping element of the clamping mechanism. The second extreme semiconductor element of the chain contacts the second clamping element of the clamping mechanism, made of an insulation material and mechanically coupled with the side walls of the case.The unit also contains current-carrying busbars electrically associated with the outputs of the extreme semiconductor elements of the chain, one of the current-carrying busbars being electrically connected with the upper part of the side wall of the case.
    Type: Grant
    Filed: November 2, 1989
    Date of Patent: May 14, 1991
    Assignee: Institut Imeni V. I. Lenina
    Inventors: Igor V. Ermilov, Jury I. Matusov, Evgeny V. Mescheryakov
  • Patent number: 4469982
    Abstract: A electron-beam tube comprises a cathode (2) made as individual tapes (6) disposed throughout the length of the tube, whose surfaces are the emitting portions of the cathode (2). Each tape (6) of the cathode (2) is provided with a near-cathode focusing electrode (9) electrically connected to the cathode (2) and disposed in the immediate vicinity of the tape (6), and with a pair of rods (10) of the control electrode (3) disposed in relation to the tape (6) so that the whole electron flow focused by the near-cathode electrode (9) passes between said rods (10). The following relations are observed in the tube:a/b=c/d; 1<d/c.ltoreq.10; e.gtoreq.b.
    Type: Grant
    Filed: April 19, 1982
    Date of Patent: September 4, 1984
    Assignee: Vsesojuzny Energetichesky Institut Imeni V. I. Lenina
    Inventors: Vladimir I. Perevodchikov, Pavel I. Akimov, David A. Skibityansky, Valentina N. Shapenko, Lev V. Loginov, Alexandr L. Shapiro, Arkady N. Yakovlev, Vitaly M. Kosmachevsky
  • Patent number: 4435748
    Abstract: The proposed method consists in that a narrow control pulse is applied to the thyristors of the arrangement at the beginning of the conduction interval of the arrangement. The positive voltage across the monitored thyristors is measured and a monitor signal is formed at the point in time when the voltage reaches a preset level. Using the received monitor signals, one can count the number of the thyristors whose positive voltage exceeds a preset level. At the point in time when the number of the monitor signals reaches a preset value, additional narrow control pulses are applied to the thyristors.The proposed control system comprises devices for measuring the positive voltage across the monitored thyristors and an adder connected to the devices. The adder and a reference signal source are coupled to a comparison circuit which, like a sync pulse source, is connected to an AND gate. The AND gate and the sync pulse source are connected to an OR gate which couples an amplifier-former connected to the arrangement.
    Type: Grant
    Filed: May 7, 1982
    Date of Patent: March 6, 1984
    Assignee: Vsesojuzny Elektrotekhnickesky Institut Imeni V.I. Lenina
    Inventors: Rem A. Lytaev, Khristofor F. Barakaev, Igor P. Taratuta, Sergei V. Krainov
  • Patent number: 4208707
    Abstract: A method for control of a static valve converter consists of determining the difference between the actual and desired control pulse phases by the use of an equidistant pulse sequence, the frequency of which being equal to the coversion frequency, the pulse sequence phase being selected so that the mean difference between the equidistant pulse phase and the phase of the respective control pulses of all valves is equal to zero, and the pulse phase difference being determined for each individual valve. A control pulse automatic balancing unit incorporated in an apparatus for realizing the method of the present invention comprises an equidistant pulse sequence assembly, a shaping element, correcting signal circuits and logical AND elements equal in number to the number of conversion phases, and also logical circuits equal in number to the number of coversion phases. Each logical circuit comprises two logical AND elements, and a logical OR element connected to the outputs of the AND elements.
    Type: Grant
    Filed: January 24, 1978
    Date of Patent: June 17, 1980
    Assignee: Vsesojuzny Elektrotekhnichesky Institut Imeni V. I. Lenina
    Inventors: Mikhail V. Olshvang, Grigory M. Tsfasman, Alexei A. Sheremet