Abstract: Systems and methods for reducing write error rate in MeRAM applications in accordance with various embodiments of the invention are illustrated. One embodiment includes a method for a writing mechanism for a magnetoelectric random access memory cell, the method including applying a voltage of a given polarity for a given period of time across a magnetoelectric junction bit of the magnetoelectric random access memory cell, wherein application of the voltage of the given polarity across the magnetoelectric junction bit reduces the perpendicular magnetic anisotropy and magnetic coercivity of the ferromagnetic free layer through a voltage controlled magnetic anisotropy effect, and lowering the applied voltage of the given polarity before the end of the given period of time, wherein the given period of time is approximately half of a precessional period of the ferromagnetic free layer.

Abstract: Systems and methods for reducing write error rate in MeRAM applications in accordance with various embodiments of the invention are illustrated. One embodiment includes a method for a writing mechanism for a magnetoelectric random access memory cell, the method including applying a voltage of a given polarity for a given period of time across a magnetoelectric junction bit of the magnetoelectric random access memory cell, wherein application of the voltage of the given polarity across the magnetoelectric junction bit reduces the perpendicular magnetic anisotropy and magnetic coercivity of the ferromagnetic free layer through a voltage controlled magnetic anisotropy effect, and lowering the applied voltage of the given polarity before the end of the given period of time, wherein the given period of time is approximately half of a precessional period of the ferromagnetic free layer.

Abstract: Reverse pulse schemes for reducing write error rate in magnetoelectric random access memory applications can be implemented in many different ways in accordance with various embodiments of the invention. One embodiment includes a method for a writing mechanism for a magnetoelectric random access memory cell, the method including applying a voltage of a given polarity for a period of time across a magnetoelectric junction bit of the magnetoelectric random access memory cell and applying a voltage of a polarity opposite the given polarity across the magnetoelectric junction bit at the end of the application of the voltage of the given polarity, wherein application of the voltage of the given polarity across the magnetoelectric junction bit reduces the perpendicular magnetic anisotropy and magnetic coercivity of the ferromagnetic free layer through a voltage controlled magnetic anisotropy effect.

Abstract: In many embodiments, Gd/GdO materials are incorporated into a magnetic heterostructure between the electrodes, either in contact with the electrodes or within the stack of the heterostructure. In some embodiments, the Gd/GdO materials can be inserted into a single magnetic layer. In several embodiments, the Gd/GdO materials can be inserted within a magnetic tunnel junction stack, i.e., a magnetic structure that includes two ferromagnetic layers separated by an insulating layer. In further embodiments, the Gd/GdO materials are utilized in voltage-controlled magnetic anisotropy-based MTJs (“VMTJs”), which are devices that uses the voltage-controlled magnetic anisotropy (“VCMA”) phenomena to reduce the coercivity of the free layer of the VMTJs to make the free layer more easily switched to the opposite direction (writeable). Gd/GdO materials can also be utilized within a magnetoelectric junction (“MEJ”) structure.

Abstract: In various embodiments, magnetic heterostructures and magnetic layers can be implemented and configured to provide electric field controlled magnetic tunnel junctions. Such magnetic heterostructures and magnetic layers can incorporate a variety of different materials and layers for various effects. In many embodiments, the magnetic heterostructures incorporate hybrid seed layers. Such layers can be incorporated for various reasons including but not limited to producing an enhanced voltage controlled magnetic anisotropy (“VCMA”) effect. The VCMA effect can be explained in terms of the electric-field-induced change of occupancy of atomic orbitals at the interface, which, in conjunction with spin-orbit interaction, results in a change of anisotropy. In some embodiments, the magnetic heterostructures and layers incorporate free layer insertions. In a number of embodiments, the magnetic heterostructures incorporate a material insertion at the interface of the tunneling barrier and the free layer.

Abstract: A sensing circuit includes a first sensing terminal, a second sensing terminal, a second grounding terminal, and a second grounding terminal. The first sensing terminal is connected to a source electrode of a transistor of a memory macro through a bit line. The second sensing terminal is electrically connected to a drain electrode of the transistor of the memory marco through a resistive memory device to a source line, and is not continuously connected to the grounding voltage. The first grounding terminal is used as a reference voltage of a voltage of the first sensing terminal. The second grounding terminal is used as a reference voltage of a voltage of the second sensing terminal. The sensing circuit outputs a sensing signal according to a voltage difference between the first sensing terminal and the second sensing terminal.

Abstract: Systems and methods in accordance with embodiments of the invention implement select devices constructed from 2D materials. In one embodiment, a crossbar memory system includes: a first set of connection lines; a second set of connection lines; and an array of memory cells, each memory cell including: a select device; and a memory device; where each memory cell is coupled to a unique combination of: at least one connection line from the first set of connection lines, and at least one connection line from the second set of connection lines; and where at least one select device includes a 2D material.

Abstract: A sensing circuit includes a first sensing terminal, a second sensing terminal, a second grounding terminal, and a second grounding terminal. The first sensing terminal is connected to a source electrode of a transistor of a memory macro through a bit line. The second sensing terminal is electrically connected to a drain electrode of the transistor of the memory marco through a resistive memory device to a source line, and is not continuously connected to the grounding voltage. The first grounding terminal is used as a reference voltage of a voltage of the first sensing terminal. The second grounding terminal is used as a reference voltage of a voltage of the second sensing terminal. The sensing circuit outputs a sensing signal according to a voltage difference between the first sensing terminal and the second sensing terminal.

Abstract: Systems and methods in accordance with embodiments of the invention implement efficient magnetoelectric junctions (MEJs). In one embodiment, an MEJ system includes: at least one MEJ, and a first layer including a piezoelectric material disposed proximate at least one MEJ; where the straining of at least some portion of the first layer including a piezoelectric material causes at least some portion of at least one MEJ to experience a stress and a related strain.

Abstract: Systems and methods for performing word line pulse techniques in magnetoelectric junctions in accordance with embodiments of the invention are disclosed. In one embodiment, a magnetoelectric random access memory (MeRAM) circuit, including, a plurality of voltage controlled magnetic tunnel junction bits (MEJs) each magnetoelectric junction connected to the drain of an MOS transistor, the combination including three terminals, each connected to a bit, source, and at least one word line, in an array, and a driver circuit, including a bit line driver, and a word line driver the bit line driver, the driver circuit generates voltage pulses for application to the magnetoelectric junction bit, the output of the driver circuit is connected to the word line, which in turn is connected to the gate of the MOS access transistor in each MeRAM cell, thereby generating a square voltage pulse across the magnetoelectric junction bit.

Abstract: Robust magnetoelectric junctions (MEJs) are disclosed. In one embodiment, an MEJ includes: a first fixed layer; a free layer; a seed layer; a cap layer; and a dielectric layer disposed between the first fixed layer and the free layer; where: one of the seed layer and the cap layer is disposed adjacently to a ferromagnetic layer; the first fixed layer is magnetized in a first direction; the free layer can adopt a magnetization direction that is either substantially parallel with or substantially antiparallel with the first direction; when a potential difference is applied across the MEJ, the coercivity of the free layer is reduced for the duration of the application of the potential difference; and at least one of the seed layer and the cap layer includes one of: Molybdenum, Tungsten, Iridium, Bismuth, Rhenium, and Gold.

Abstract: The present disclosure provides a calibration method for a nonvolatile memory device having a plurality of unit cells, each of the unit cells corresponding to a word line and a bit line of the nonvolatile memory device. The calibration method includes: calibrating a word signal pulse of each of the word lines with a first calibration value corresponding to the word line; calibrating a bit signal pulse of each of the bit lines with a second calibration value corresponding to the bit line; and calibrating each of the unit cells according to the word line and the bit line corresponding to the unit cell.

Abstract: Systems and methods in accordance with embodiments of the invention implement magnetoelectric junctions that include integrated magnetization components. In one embodiment, a magnetoelectric junction includes: a first fixed layer; a free layer; a dielectric layer disposed between the first fixed layer and the free layer; at least one magnetization layer that is disposed proximate the free layer; where: the first fixed layer is magnetized in a first direction; the free layer can adopt a magnetization direction that is either substantially parallel with or antiparallel with the first direction; the at least one magnetization layer is magnetized in a second direction that is orthogonal to the first direction; the magnetoelectric junction is characterized by a VCMA coefficient of at least approximately 80 fJ/V·m; and the magnetoelectric junction is configured such that a voltage pulse of a proper length in time can cause the free layer to invert its magnetization direction.

Abstract: Robust magnetoelectric junctions (MEJs) are disclosed. In one embodiment, an MEJ includes: a first fixed layer; a free layer; a seed layer; a cap layer; and a dielectric layer disposed between the first fixed layer and the free layer; where: one of the seed layer and the cap layer is disposed adjacently to a ferromagnetic layer; the first fixed layer is magnetized in a first direction; the free layer can adopt a magnetization direction that is either substantially parallel with or substantially antiparallel with the first direction; when a potential difference is applied across the MEJ, the coercivity of the free layer is reduced for the duration of the application of the potential difference; and at least one of the seed layer and the cap layer includes one of: Molybdenum, Tungsten, Iridium, Bismuth, Rhenium, and Gold.

Abstract: Systems and methods in accordance with embodiments of the invention implement select devices constructed from 2D materials. In one embodiment, a crossbar memory system includes: a first set of connection lines; a second set of connection lines; and an array of memory cells, each memory cell including: a select device; and a memory device; where each memory cell is coupled to a unique combination of: at least one connection line from the first set of connection lines, and at least one connection line from the second set of connection lines; and where at least one select device includes a 2D material.

Abstract: Embodiments of the invention implement MEJs having improved read-write characteristics. In one embodiment, an MEJ includes: ferromagnetic fixed and free layers, a dielectric layer interposed between the ferromagnetic layers, and an additional dielectric layer proximate the free layer, where the fixed layer is magnetically polarized in a first direction, where the free layer has a first easy axis that is aligned with the first direction, and where the MEJ is configured such that when subject to a potential difference, the magnetic anisotropy of the free layer is altered such that the relative strength of the magnetic anisotropy along a second easy axis that is orthogonal to the first easy axis, compared to the strength of the magnetic anisotropy along the first easy axis, is magnified during the application of the potential difference, where the extent of the magnification is enhanced by the presence of the additional layer.