Patents Assigned to Intel IP Corporation
  • Patent number: 10872812
    Abstract: Various embodiments include, for example, a noise suppression filter for a power-delivery network (PDN). In one exemplary embodiment, a capacitor device, which may be used as at least a portion of the noise suppression filter, includes a first conductive plate and a second conductive plate with a dielectric material formed between the first conductive plate and the second conductive plate. A floating conductive fill layer is formed within the dielectric material and between the first conductive plate and the second conductive plate. Other embodiments of capacitors, and methods of forming the capacitor, are disclosed.
    Type: Grant
    Filed: March 9, 2018
    Date of Patent: December 22, 2020
    Assignee: Intel IP Corporation
    Inventors: Saravana Maruthamuthu, Shankar Chandrasekaran Jayendra, Shidlingeshwar Khatakalle
  • Patent number: 10869257
    Abstract: Some demonstrative embodiments include devices, systems and/or methods of cellular-assisted Wireless Local Area Network (WLAN) regulatory information. For example, a User Equipment (UE) may include a WLAN transceiver; a cellular transceiver to receive from an Evolved Node B (eNB) a cellular message including regulatory information indicating one or more regulatory restrictions corresponding to WLAN communications over at least one WLAN frequency band, the regulatory information including at least an indication on whether or not WLAN active scanning is allowed over the WLAN frequency band; and a controller component configured to, based on the regulatory information, enable or disable the WLAN transceiver to perform a WLAN active scan over the WLAN frequency band.
    Type: Grant
    Filed: December 24, 2015
    Date of Patent: December 15, 2020
    Assignee: INTEL IP CORPORATION
    Inventors: Alexander Sirotkin, Ofer Hareuveni, Jerome Parron
  • Patent number: 10868622
    Abstract: Embodiments of the present disclosure may relate to an apparatus with a first component and a second component coupled with the first component by a plurality of signal wires. A first wire of the plurality of signal wires may be to carry a command byte of a packet and a first data byte of the packet from the first component to the second component. A second wire of the plurality of signal wires may be to carry a second data byte of the packet from the first component to the second component when the first signal wire carries the command byte of the packet and carry a third data byte of the packet from the first component to the second component when the first signal wire carries the first data byte of the packet. Other embodiments may be described or claimed.
    Type: Grant
    Filed: June 22, 2017
    Date of Patent: December 15, 2020
    Assignee: Intel IP Corporation
    Inventors: Todor M. Mladenov, Helmut Reinig, Simona Bernardi
  • Patent number: 10867194
    Abstract: Herein is disclosed an image-based detection system comprising, one or more image sensors, configured to receive images of a vicinity of a control; and one or more processors, configured to identify within the images a control actuator and the control; detect a trigger action of the control actuator relative to the control based on the images; and switch from a normal control mode to a safety mode according to the detected trigger action.
    Type: Grant
    Filed: December 29, 2017
    Date of Patent: December 15, 2020
    Assignee: INTEL IP CORPORATION
    Inventor: Daniel Pohl
  • Patent number: 10867934
    Abstract: A microelectronic device may include a substrate, a component, a first plate, a second plate, and a shield. The component may be disposed at least partially within the substrate. The first plate may be disposed on a first side of the component. The second plate may be disposed on a second side of the component. The shield may be disposed around at least a portion of a periphery of the component.
    Type: Grant
    Filed: March 27, 2018
    Date of Patent: December 15, 2020
    Assignee: Intel IP Corporation
    Inventors: Saravana Maruthamuthu, Thomas Ort, Andreas Wolter, Andreas Augustin, Veronica Sciriha, Bernd Waidhas
  • Patent number: 10866145
    Abstract: Some embodiments include apparatuses and methods having a node to receive ground potential, a first diode including an anode coupled to the node, a second diode including an anode coupled to the node, a first circuit to apply a voltage to a cathode of each of the first and second diodes to cause the first and second diodes to be in a forward-bias condition, and a second circuit to generate a signal having a duty cycle based on a first voltage across the first diode and a second voltage across the second diode. At least one of such the embodiments includes a temperature calculator to calculate a value of temperature based at least in part on the duty cycle of the signal.
    Type: Grant
    Filed: November 13, 2017
    Date of Patent: December 15, 2020
    Assignee: Intel IP Corporation
    Inventor: Matthias Eberlein
  • Patent number: 10869310
    Abstract: Methods, apparatuses, and computer-readable media for classification of basic service sets (BSS) based on transmission opportunity holder addresses are disclosed. An apparatus of a high-efficiency (HE) station is disclosed comprising processing circuitry. The processing circuitry may be configured to if the frame is not classified as an intra basic service set (BSS) or inter BSS, and the frame comprises a transmission holder (TXOP) address: classify the frame as the inter-BSS frame, if the TXOP address matches a first stored TXOP address associated with a basic network allocation vector (NAV) and the first stored TXOP address is classified as an inter-basic service set (BSS) frame, or classify the frame as an intra-BSS frame if the TXOP address matches a second stored TXOP address associated with a non-zero intra-BSS NAV.
    Type: Grant
    Filed: December 20, 2018
    Date of Patent: December 15, 2020
    Assignee: Intel IP Corporation
    Inventors: Po-Kai Huang, Laurent Cariou, Robert J. Stacey
  • Patent number: 10863544
    Abstract: Methods and devices are described for providing wireless stations (STAs) with two sets of enhanced distributed channel access (EDCA) parameters. Legacy EDCA parameters that are for single user (SU) operations and may be used by both high-efficiency (HE) STAs and legacy STAs without multi-user (MU) capability. MU EDCA parameters are defined to be more restrictive than legacy EDCA parameters in favoring MU operations. Embodiments are described that define sets of rules for regulating how STAs capable of both SU and MU uplink operations can use the different sets of EDCA parameters.
    Type: Grant
    Filed: April 30, 2019
    Date of Patent: December 8, 2020
    Assignee: Intel IP Corporation
    Inventors: Laurent Cariou, Po-Kai Huang, Chittabrata Ghosh, Robert J. Stacey
  • Patent number: 10863373
    Abstract: Described are methods and devices for increasing the efficiency of Wi-Fi networks by increased spatial reuse, which refers to sharing the same wireless spectral resources over different spatial regions. A described technique for doing this is for a Wi-Fi device to increase the threshold of the clear channel assessment (CCA) so as to ignore and regard as interference the transmissions from other devices. The sensing range of the Wi-Fi device then decreases, and the spatial resource can be reused by different Wi-Fi devices in different spatial locations.
    Type: Grant
    Filed: December 12, 2018
    Date of Patent: December 8, 2020
    Assignee: Intel IP Corporation
    Inventors: Po-Kai Huang, Robert J. Stacey
  • Patent number: 10862968
    Abstract: Disclosed in some examples are methods, systems, and machine readable mediums which automatically generate standardized interfaces to sensor data consumers, provide sensor data search functionality, automatically determine data quality, and cache previously used sensor data to minimize the burden on application developers and minimize API call costs.
    Type: Grant
    Filed: April 1, 2016
    Date of Patent: December 8, 2020
    Assignee: Intel IP Corporation
    Inventors: Ralf Graefe, Damian Kelly
  • Patent number: 10852723
    Abstract: Herein is disclosed an unmanned aerial vehicle photography system comprising at least a first unmanned aerial vehicle and a second unmanned aerial vehicle; the first unmanned aerial vehicle further comprising one or more image sensors, configured to obtain a subject image of a subject; and one or more processors, configured to cause the one or more image sensors to obtain the subject image synchronously with the second unmanned aerial vehicle.
    Type: Grant
    Filed: November 14, 2017
    Date of Patent: December 1, 2020
    Assignee: INTEL IP CORPORATION
    Inventors: Marco Moeller, Daniel Pohl, Tobias Gurdan
  • Patent number: 10854372
    Abstract: An inductor has a conductor layer formed by multiple concentric co-planar turns of a first metal layer (e.g., ultra-thick metal (UTM)) adapted to receive current at a frequency of at least one gigahertz. The multiple turns of the first metal layer proceed from an innermost turn to an outermost turn, and a stacking layer of a second metal is provided over each of the first metal layer turns except at least the innermost turn, thereby optimizing the Q of the inductor.
    Type: Grant
    Filed: November 15, 2018
    Date of Patent: December 1, 2020
    Assignee: Intel IP Corporation
    Inventors: Chi-Taou Robert Tsai, Lillian G. Lent, Curtiss D. Roberts, Cindy Muir
  • Patent number: 10854590
    Abstract: An apparatus is described that includes a semiconductor die package. The semiconductor die package includes a semiconductor die package substrate having a top side and a bottom side. The semiconductor die package includes I/O balls on the bottom side of the semiconductor die package substrate. The I/O balls are to mount to a planar board. The semiconductor die package includes a first semiconductor die mounted on the bottom side of the semiconductor die package substrate. The first semiconductor die is vertically located between the bottom side of the semiconductor die package substrate and a second semiconductor die that is a part of the semiconductor die package.
    Type: Grant
    Filed: December 23, 2015
    Date of Patent: December 1, 2020
    Assignee: Intel IP Corporation
    Inventors: Sven Albers, Klaus Reingruber, Richard Patten, Georg Seidemann, Christian Geissler
  • Patent number: 10848929
    Abstract: Some demonstrative embodiments include apparatuses, systems and/or methods of terminating a Neighbor Awareness Networking (NAN) path. For example, an apparatus may include logic and circuitry configured to cause a first NAN device to transmit a message including a NAN Data Link (NDL) attribute corresponding to an NDL with a second NAN device, the NDL attribute including a Maximal (Max) Idle Period field to indicate a time period during which the second NAN device is allowed to refrain from transmitting over the NDL without the NDL being terminated; and to allow the first NAN device to terminate all NAN Data Paths (NDPs) over the NDL, if any frame is not received from the second NAN device for at least the time period indicated by the Max Idle Period field.
    Type: Grant
    Filed: February 28, 2019
    Date of Patent: November 24, 2020
    Assignee: INTEL IP CORPORATION
    Inventors: Po-Kai Huang, Emily H. Qi, Elad Oren
  • Patent number: 10845413
    Abstract: Existing multi-wire debugging protocols, such as 4-wire JTAG, 2-wire cJTAG, or ARM SWD, are run through a serial wireless link by providing the debugger and the target device with hardware interfaces that include UARTs and conversion bridges. The debugger interface serializes outgoing control signals and de-serializes returning data. The target interface de-serializes incoming control signals and serializes outgoing data. The actions of the interfaces are transparent to the inner workings of the devices, allowing re-use of existing debugging software. Compression, signal combining, and other optional enhancements increase debugging speed and flexibility while wirelessly accessing target devices that may be too small, too difficult to reach, or too seal-dependent for a wired connection.
    Type: Grant
    Filed: May 15, 2018
    Date of Patent: November 24, 2020
    Assignee: Intel IP Corporation
    Inventors: Sankaran M. Menon, Bradley H. Smith, Jinshi Huang, Rolf H. Kuehnis
  • Patent number: 10849002
    Abstract: An arrangement configured to be employed within a user equipment (UE). The arrangement includes control circuitry. The control circuitry is configured to obtain a measurement configuration, where the measurement configuration complies with license assisted access (LAA) and includes a measurement window; obtain one or more discovery reference signals (DRS) from an evolved Node B (eNodeB) during the measurement window; determine SINR estimates based on the one or more DRS, compare the SINR estimates to a threshold; generate a target cell measurement based on the one or more DRS, the SINR estimates and the measurement configuration; and generate a measurement report that includes the target cell measurement.
    Type: Grant
    Filed: August 30, 2016
    Date of Patent: November 24, 2020
    Assignee: Intel IP Corporation
    Inventors: Rui Huang, Yang Tang
  • Patent number: 10845879
    Abstract: Components, devices, systems, and methods for providing passive haptic feedback for a user interacting with a virtual reality simulation. A physical object with a surface may represents an object in the virtual reality simulation. A mechanism may be configured to change a shape or size of the surface of the physical object in response to a change in the virtual reality simulation.
    Type: Grant
    Filed: May 2, 2018
    Date of Patent: November 24, 2020
    Assignee: Intel IP Corporation
    Inventors: Daniel Pohl, Roman Schick
  • Patent number: 10848957
    Abstract: This document discusses, among other things, a Cellular Internet-of-Things (CIoT) network architecture to enable communication between an apparatus of a CIoT User Equipment (UE) and a network through a CIoT enhanced Node B (eNB) according to a lightweight Non-Access Stratum (NAS) protocol. An apparatus of a CIoT eNB can process data for communication between the CIoT UE and the network. The lightweight NAS protocol supports a reduced set of NAS messages for communication between, for example, the CIoT UE and the CIoT eNB, such as using a modified NAS message, or one or more new messages.
    Type: Grant
    Filed: February 11, 2020
    Date of Patent: November 24, 2020
    Assignee: Intel IP Corporation
    Inventors: Puneet Jain, Farid Adrangi, Muthaiah Venkatachalam
  • Patent number: 10841910
    Abstract: Disclosed herein are apparatuses, systems, and methods using or implementing a control channel (PDCCH) design. The PDCCH can occupy an initial number of OFDM symbols of a downlink subframe, while occupying less than the full system bandwidth. The PDCCH can be time division multiplexed (TDM) with a shared channel (PDSCH) or frequency division multiplexed (FDM) with a PDSCH. The PDCCH can further be multiplexed with another PDCCH in a contiguous or non-contiguous region. Resources allocated to the PDCCH can overlap or partially overlap resources allocated to the PDSCH. An Evolved Node-B (eNB) can provide configuration information for the PDCCH design in Radio Resource Control (RRC) signaling to a user equipment (UE), or through use of a Master Information Block (MIB) or System Information Block (SIB).
    Type: Grant
    Filed: December 10, 2015
    Date of Patent: November 17, 2020
    Assignee: Intel IP Corporation
    Inventors: Gang Xiong, Jong-Kae Fwu, Yuan Zhu, Ralf Matthias Bendlin, Yushu Zhang, Huaning Niu
  • Patent number: 10840923
    Abstract: For example, a digital PLL may include a digitally controlled Ring Oscillator (DCRO) configured to generate a frequency output based on a control signal, the DCRO comprising a plurality of stages in a cyclic order, a first stage of the plurality of stages comprising a plurality of inverter modules controlled by the control signal and comprising a plurality of outputs that drive inputs of a plurality of second stages in the plurality of stages; a decoder to decode a phase of the DCRO based on a plurality of sampled phases of the plurality of stages of the DCRO; and a phase error estimator to estimate a phase error based on the phase of the DCRO and a frequency control word, the control signal is based on the phase error.
    Type: Grant
    Filed: September 29, 2016
    Date of Patent: November 17, 2020
    Assignee: INTEL IP CORPORATION
    Inventors: Ashoke Ravi, Rotem Banin, Ofir Degani, David Ben-Haim, Yigal Kalmanovich