Patents Assigned to Interconnect Portfolio, LLC
  • Publication number: 20130090017
    Abstract: An electronic wiping torsional connector for use in connecting to mating contacts on an insulating base. The connector includes a plurality of contacts 1-10 each having a contact 13 and an anchor 14. Contacts 1-10 twist against anchor 14 when the insulating base is inserted into the connector to provide the wiping contact. In an alternative embodiment, the conductors are wires having two bends at different angles. One bend is elongated such that it engages a paddle before the other and rotates the other bend into contact with a ribbon contact located on the paddle.
    Type: Application
    Filed: November 30, 2012
    Publication date: April 11, 2013
    Applicant: INTERCONNECT PORTFOLIO LLC
    Inventor: Joseph C. Fjelstad
  • Publication number: 20130078826
    Abstract: An electrical connector comprising a pair of elongated bodies, each having a facing ramp, the ramp having an notch, each having a rotatable torsion bar conductor with a tip located in the notch, the end of a tip spaced above the ramp such that when the two bodies are mated, the tips engage the ramp of the other connector and rotate against a torsional restoring force, and when fully mated, the two ramps abut each other, notches aligned, with the respective tips of the torsion bars engaging the torsion bar of the other body in the aligned notches.
    Type: Application
    Filed: November 8, 2012
    Publication date: March 28, 2013
    Applicant: INTERCONNECT PORTFOLIO LLC
    Inventors: Gary Yasumura, Kevin P. Grundy, William F. Wiedemann, Joseph C. Fjelstad, Rara K. Segaram
  • Patent number: 8333617
    Abstract: An electronic wiping torsional connector for use in connecting to mating contacts on an insulating base. The connector includes a plurality of contacts 1-10 each having a contact 13 and an anchor 14. Contacts 1-10 twist against anchor 14 when the insulating base is inserted into the connector to provide the wiping contact. In an alternative embodiment, the conductors are wires having two bends at different angles. One bend is elongated such that it engages a paddle before the other and rotates the other bend into contact with a ribbon contact located on the paddle.
    Type: Grant
    Filed: May 16, 2012
    Date of Patent: December 18, 2012
    Assignee: Interconnect Portfolio LLC
    Inventor: Joseph C. Fjelstad
  • Patent number: 8313333
    Abstract: An electrical connector. An electrical connector a pair of cylindrical housings, one having a plurality of torsion bar conductors and a second having a plurality of ramps. Rotating the pair of housings relative to one another causes an angled tip on the torsion bar to rotate as it moves up the ramp. A land is provided to discontinue further rotation of the torsion bar tip as the housings continue to rotate.
    Type: Grant
    Filed: December 16, 2011
    Date of Patent: November 20, 2012
    Assignee: Interconnect Portfolio LLC
    Inventors: Gary Yasumura, Kevin P. Grundy, William F. Wiedermann, Joseph C. Fjelstad, Para K. Segaram
  • Patent number: 8246387
    Abstract: An electronic wiping torsional connector for use in connecting to mating contacts on an insulating base. The connector includes a plurality of contacts 1-10, each having a contact area 93 adapted for wiping contact to a pad, an anchor area 92, and flattened, ribbon-like connector for receiving a wiping contact. Contacts 1-10 twist against an anchor 92 when the insulating base is inserted into the connector to provide the wiping contact.
    Type: Grant
    Filed: January 8, 2010
    Date of Patent: August 21, 2012
    Assignee: Interconnect Portfolio LLC
    Inventor: Joseph C. Fjelstad
  • Publication number: 20120149250
    Abstract: An electrical connector. An electrical connector a pair of cylindrical housings, one having a plurality of torsion bar conductors and a second having a plurality of ramps. Rotating the pair of housings relative to one another causes an angled tip on the torsion bar to rotate as it moves up the ramp. A land is provided to discontinue further rotation of the torsion bar tip as the housings continue to rotate.
    Type: Application
    Filed: December 16, 2011
    Publication date: June 14, 2012
    Applicant: INTERCONNECT PORTFOLIO LLC
    Inventors: Gary Yasumura, William F. Wiedemann, Joseph C. Fjelstad, Para K. Segaram, Kevin P. Grundy
  • Patent number: 8079848
    Abstract: An electrical connector. An electrical connector comprising a connector body having a first channel and a first conductive element extending through the first channel in a first tip section. The first tip section having a first moment arm that, when forced in contact with a first conductive surface, twists the first conductive element to produce a torsion force. The torsion force holds the first tip section in contact with the first conductive surface.
    Type: Grant
    Filed: March 21, 2011
    Date of Patent: December 20, 2011
    Assignee: Interconnect Portfolio LLC
    Inventors: Gary Yasumura, Kevin P. Grundy, William F. Wiedemann, Joseph C. Fjelstad, Para K. Segaram
  • Publication number: 20110171857
    Abstract: An electrical connector. An electrical connector comprising a connector body having a first channel and a first conductive element extending through the first channel in a first tip section. The first tip section having a first moment arm that, when forced in contact with a first conductive surface, twists the first conductive element to produce a torsion force. The torsion force holds the first tip section in contact with the first conductive surface.
    Type: Application
    Filed: March 21, 2011
    Publication date: July 14, 2011
    Applicant: INTERCONNECT PORTFOLIO LLC
    Inventors: Gary Yasumura, William F. Wiedemann, Joseph C. Fjelstad, Para K. Segaram, Kevin P. Grundy
  • Publication number: 20110079912
    Abstract: A method and apparatus for off-chip ESD protection, the apparatus includes an unprotected IC 22 stacked on an ESD protection chip 24 and employing combinations of edge wrap 32 and through-silicon via connectors 44 for electrical connection from an external connection lead 34 on a chip carrier 84 or system substrate 64, to an ESD protection circuit, and to an I/O trace 46 of the unprotected IC 22. In one embodiment the invention provides an ESD-protected stack 50 of unprotected IC chips 52, 54 that has reduced hazard of mechanical and ESD-damage in subsequent handling for assembly and packaging. The method includes a manufacturing method 170 for mass producing embedded edge wrap connectors 32, 38 during the chip manufacturing process.
    Type: Application
    Filed: October 5, 2009
    Publication date: April 7, 2011
    Applicant: INTERCONNECT PORTFOLIO LLC
    Inventor: Phil P. Marcoux
  • Patent number: 7909615
    Abstract: An electrical connector. An electrical connector comprising a connector body having a first channel and a first conductive element extending through the first channel in a first tip section. The first tip section having a first moment arm that, when forced in contact with a first conductive surface, twists the first conductive element to produce a torsion force. The torsion force holds the first tip section in contact with the first conductive surface.
    Type: Grant
    Filed: November 23, 2010
    Date of Patent: March 22, 2011
    Assignee: Interconnect Portfolio LLC
    Inventors: Gary Yasumura, Kevin P. Grundy, William F. Wiedemann, Joseph C. Fjelstad, Para K. Segaram
  • Publication number: 20110065332
    Abstract: An electrical connector. An electrical connector comprising a connector body having a first channel and a first conductive element extending through the first channel in a first tip section. The first tip section having a first moment arm that, when forced in contact with a first conductive surface, twists the first conductive element to produce a torsion force. The torsion force holds the first tip section in contact with the first conductive surface.
    Type: Application
    Filed: November 23, 2010
    Publication date: March 17, 2011
    Applicant: INTERCONNECT PORTFOLIO LLC
    Inventors: Gary Yasumura, William F. Wiedemann, Joseph C. Fjelstad, Para K. Segaram, Kevin P. Grundy
  • Patent number: 7845986
    Abstract: An electrical connector. An electrical connector comprising a connector body having a first channel and a first conductive element extending through the first channel in a first tip section. The first tip section having a first moment arm that, when forced in contact with a first conductive surface, twists the first conductive element to produce a torsion force. The torsion force holds the first tip section in contact with the first conductive surface.
    Type: Grant
    Filed: May 6, 2005
    Date of Patent: December 7, 2010
    Assignee: Interconnect Portfolio LLC
    Inventors: Gary Yasumura, William F. Wiedemann, Joseph C. Fjelstad, Para K. Segaram, Kevin P. Grundy
  • Publication number: 20100289130
    Abstract: A method and apparatus for constructing a packaged integrated circuit stack 40 having at least two packaged integrated circuits 44 and 45 with an interposer 42 between the packaged integrated circuits 44 and 45. Interposer 42 is provided with apertures 47 which allow adhesive 50 to flow through interposer 42 to bond packaged integrated circuits 44 and 45 together with interposer 42. Alternate embodiments provide holes 54 to allow passage of leads 56 through interposer 42 to a substrate 60 through additional connections 48. The method describes the construction of the stack.
    Type: Application
    Filed: May 12, 2009
    Publication date: November 18, 2010
    Applicant: INTERCONNECT PORTFOLIO LLC
    Inventor: Joseph C. Fjelstad
  • Publication number: 20100284115
    Abstract: An ESD device with a protection structure utilizing radiated heat dissipation to prevent or reduce thermal failures. The device includes a voltage switchable polymer 10 between electrodes 11 and 12, which is configured to provide a heat radiating surface 40 for radiating heat when an ESD condition occurs. A radiation transmission material 19 is disposed between the heat radiating surface and the environment for radiating heat 20 when an ESD event occurs. One embodiment adds a spacer 50 for accurately spacing electrodes. A method for fabricating the device is further illustrated.
    Type: Application
    Filed: May 5, 2009
    Publication date: November 11, 2010
    Applicant: INTERCONNECT PORTFOLIO LLC
    Inventors: Kevin P. Grundy, Joseph C. Fjelstad
  • Publication number: 20100258952
    Abstract: Integrated circuit chips have top and bottom surfaces. The bottom surfaces comprise a plurality of IC die terminals in flip-chip assembly with fine-pitch terminals formed on the top surface of corresponding interconnection substrate. Each IC chip includes one or more through-silicon vias and/or edge wrap connectors that extend to the top surface, terminating in IC die terminals. Flexible connectors are coupled between the IC die terminals on the top surfaces of corresponding first and second integrated circuit chips. The flexible connectors are preferably controlled impedance, and may include differential pairs, including twisted pairs, coaxial pairs, and broadside pairs. Conductive vias within the interconnection substrates couple the fine-pitch terminals to corresponding next-level terminals on the bottom surface of the respective interconnection substrates. The next level terminals of the interconnection substrates are interconnected with terminals of a printed circuit board.
    Type: Application
    Filed: April 7, 2010
    Publication date: October 14, 2010
    Applicant: INTERCONNECT PORTFOLIO LLC
    Inventor: Joseph C. Fjelstad
  • Publication number: 20100221871
    Abstract: An IC package having multiple surfaces for interconnection with interconnection elements making connections from the IC chip to the I/O terminations of the package assembly which reside on more than one of its surfaces and which make interconnections to other devices or assemblies that are spatially separated.
    Type: Application
    Filed: May 12, 2010
    Publication date: September 2, 2010
    Applicant: INTERCONNECT PORTFOLIO LLC
    Inventors: Joseph C. Fjelstad, Para K. Segaram, Thomas J. Obenhuber, Kevin P. Grundy, Inessa Obenhuber
  • Patent number: 7750446
    Abstract: Disclosed are IC package structures comprised of standard IC packages modified with separate circuit interconnection structures and disposed to interconnect either directly to other IC packages or to intermediate pedestal connectors which serve to support and interconnect various circuit elements, thus effectively allowing critical signals to bypass the generally less capable interconnection paths within standard interconnection substrates.
    Type: Grant
    Filed: July 14, 2005
    Date of Patent: July 6, 2010
    Assignee: Interconnect Portfolio LLC
    Inventors: Joseph C. Fjelstad, Kevin P. Grundy, Gary Yasumura
  • Publication number: 20100165525
    Abstract: Disclosed are low profile discrete electronic component structures that are suitable for placement and use in a vertical interconnection mode either within an electronic interconnection substrate, between interconnection substrate and electronic component or within an IC package.
    Type: Application
    Filed: March 9, 2010
    Publication date: July 1, 2010
    Applicant: INTERCONNECT PORTFOLIO LLC
    Inventors: Joseph C. Fjelstad, Kevin P. Grundy, Para K. Segaram, William F. Wiedemann, Thomas J. Obenhuber, Inessa Obenhuber
  • Publication number: 20100151704
    Abstract: An electrical connector comprised of a plurality of electrical contacts arranged in a stair-step configuration designed to mate with electrical components having electrical contacts arranged in a stair-step configuration. A direct connect signaling system comprised of stair-step electrical connectors mated to stair-step printed circuit boards, other stair-step electrical components, or combinations thereof.
    Type: Application
    Filed: January 25, 2010
    Publication date: June 17, 2010
    Applicant: INTERCONNECT PORTFOLIO LLC
    Inventors: Gary Yasumura, Joseph C. Fjelstad, William F. Wiedemann, Para K. Segaram, Kevin P. Grundy
  • Patent number: 7737545
    Abstract: An IC package having multiple surfaces for interconnection with interconnection elements making connections from the IC chip to the I/O terminations of the package assembly which reside on more than one of its surfaces and which make interconnections to other devices or assemblies that are spatially separated.
    Type: Grant
    Filed: February 13, 2006
    Date of Patent: June 15, 2010
    Assignee: Interconnect Portfolio LLC
    Inventors: Joseph C. Fjelstad, Para K. Segaram, Thomas J. Obenhuber, Inessa Obenhuber, legal representative, Kevin P. Grundy