Abstract: A cascading microwave isolator (cascade) includes a set of Josephson devices, each Josephson device in the set having a corresponding operating bandwidth of microwave frequencies. Different operating bandwidths have different corresponding center frequencies. A series coupling is formed between first Josephson device from the set and an nth Josephson device from the set. The series coupling causes the first Josephson device to isolate a signal at a first frequency from a frequency multiplexed microwave signal (multiplexed signal) in a first signal flow direction through the series coupling and the nth Josephson device to isolate a signal at an nth frequency from the multiplexed signal in the first signal flow direction through the series.

Abstract: A method, system, and computer program product for amorphous data preparation for efficient query formulation are provided in the illustrative embodiments. A normalized form of representing a set of data cubes is selected, wherein the set of data cubes includes a first data cube conforming to first data representation and a second data cube conforming to a second data representation, and wherein the normalized form selects a third data representation to represent the data of each data cube in the set. A transformation is applied to the first data cube to represent the first data cube using the third data representation to create a normalized first data cube. A set of metadata elements corresponding to the normalized first data cube is computed. The normalized first data cube and the metadata of the normalized first data cube are saved in a data store.

Abstract: A method for semiconductor fabrication includes forming at least one of a diffusion barrier layer and a metal containing layer over a dielectric layer in a gate cavity. A first anneal is performed to diffuse elements from the at least one of the diffusion barrier layer and the metal containing layer into the dielectric layer. The metal containing layer and the diffusion barrier layer are removed. A second anneal is performed to adjust diffusion of the elements in the dielectric layer to provide a gate dielectric region.

Abstract: In one aspect, a method for forming an electronic device includes the following steps. An ETSOI layer of an ETSOI wafer is patterned into one or more ETSOI segments each of the ETSOI segments having a width of from about 3 nm to about 20 nm. A gate electrode is formed over a portion of the one or more ETSOI segments which serves as a channel region of a transistor, wherein portions of the one or more ETSOI segments extending out from under the gate electrode serve as source and drain regions of the transistor. At least one TSV is formed in the ETSOI wafer adjacent to the transistor. An electronic device is also provided.

Abstract: In response to a query of discernable facial attributes, the locations of distinct and different facial regions are estimated from face image data, each relevant to different attributes. Different features are extracted from the estimated facial regions from database facial images, which are ranked in base layer rankings by matching feature vectors to a base layer ranking sequence as a function of edge weights. Second-layer rankings define second-layer attribute vectors as combinations of the base-layer feature vectors and associated base layer parameter vectors for common attributes, which are matched to a second-layer ranking sequence as a function of edge weights. The images are thus ranked for relevance to the query as a function of the second-layer rankings.

Abstract: Described herein are some embodiments that use smart objects in a virtual universe to conserve computing resources. Some embodiments describe a first object that detects an indication to reduce resource usage of a computing resource that supports a virtual universe. Some embodiments further describe reducing, based on detection of the indication to reduce resource usage, display quality of the first virtual object according to an order of degrees of display quality reduction that corresponds to one or more degrees of resource reduction required for the computing resource. Further, some embodiments describe a second virtual object that is not reduced in display quality while simultaneously the first virtual object is reduced in display quality.

Abstract: The present invention is directed to the formation of sublithographic features in a semiconductor structure using self-assembling polymers. The self-assembling polymers are formed in openings in a hard mask, annealed and then etched, followed by etching of the underlying dielectric material. At least one sublithographic feature is formed according to this method. Also disclosed is an intermediate semiconductor structure in which at least one interconnect wiring feature has a dimension that is defined by a self-assembled block copolymer.

Abstract: The filtering operations normally performed at the output port side of an Infiniband (or similar protocol) routing switch are performed in parallel at the input side to prevent data packets from being placed on a queue from which they would ordinarily ultimately be discarded, thus removing “bad” packets that would normally have a negative impact on the bandwidth of the switch. Bad data packets thus do not consume space in a central queue nor bandwidth in a crossbar switch.

Abstract: The present invention relates to ultra-large scale integrated (ULSI) interconnect structures, and more particularly to patternable low dielectric constant (low-k) materials suitable for use in ULSI interconnect structures. The patternable low-k dielectrics disclosed herein are functionalized polymers that having one or more acid-sensitive imageable functional groups.

Abstract: A system for switching data packets through a multiple (m) input, multiple (n) output switching device providing switching having a fast one-cycle throughput. A respective switching device behaves like an output queued switch from a set of distributed output queues reading the incoming input control information from the plurality of input ports (IP) and compresses the information in a form which allows an easy association with a respective output port (OP) to which an individual input port is temporarily mapped.

Abstract: Methods and apparatus that may be utilized to reduce latency associated with encryption based on externally stored security metadata are provided. When encrypted data is accessed for the first time, a cache line containing corresponding metadata used for decryption may be placed in an internal security metadata cache. If that data is accessed again, it may be retrieved without accessing external memory, thus reducing latency. Further, if adjacent data is accessed, the cached line may contain sufficient metadata to decrypt the adjacent data. As a result, a separate operation to access metadata for the adjacent data may be avoided, thus reducing latency.

Abstract: Embodiments of the present invention address deficiencies of the art in respect to traceability visualization in a model driven development (MDD) tool and provide a method, system and computer program product for visualization of implicit relationships in a trace query for MDD. In an embodiment of the invention, a method for visualization of implicit relationships in a trace query for MDD can be provided. The method can include issuing a model query in an MDD tool, retrieving an implicit relationship in response to the model query, generating a trace link for the implicit relationship and displaying the trace link in a trace query diagram for the MDD tool.

Abstract: A method and system for improving the accuracy of offline signature verification techniques by analyzing the high pressure regions of an image of the signature. The method and system may analyze global and local features in the high pressure regions of the image for increased verification accuracy.

Abstract: A program which is linked or bound by reference (referenced program) into one or more other programs supports multiple valid export signatures, each corresponding to a respective version of the referenced program. When a program is built, it records the current signature of each referenced program it is bound to. When subsequently determining whether to rebuild the program, the previously recorded signature of any referenced program is compared with all currently supported signatures of the referenced program, and only if none of the supported signatures matches does the program need to be re-built to ensure compatibility with the referenced program. Preferably, the referenced program is a program library containing supporting procedures, intended to be used by multiple applications programs which are bound to it.

Abstract: A 4-to-2 carry save adder with a reduction in the delay of outputting the sum and carry bits. The 4-to-2 carry save adder may include a lower order full order coupled to a higher order full adder. The carry save adder may further include a logic unit coupled to the higher order full adder where the logic unit is configured to generate a carry bit to be inputted to the higher order full adder that normally would be generated from the carry save adder located in the previous stage. By generating this carry bit (carry-in bit) in the current stage and not in the previous stage, the delay of the carry-in bit inputted to the higher order full adder is reduced thereby reducing the delay of outputting the sum and carry bits by the higher order full adder.

Abstract: A method for speech synthesis includes receiving an input speech signal containing a set of speech segments, and estimating spectral envelopes of the input speech signal in a succession of time intervals during each of the speech segments. The spectral envelopes are integrated over a plurality of window functions in a frequency domain so as to determine elements of feature vectors corresponding to the speech segments. An output speech signal is reconstructed by concatenating the feature vectors corresponding to a sequence of the speech segments.

Abstract: A packetized cascade memory system including a plurality of memory assemblies, a memory bus including multiple segments, a bus repeater module and a segment level sparing module. The bus repeater module is in communication with two or more of the memory assemblies via the memory bus. The segment level sparing module provides segment level sparing for the communication bus upon segment failure.

Abstract: A network handler uses a DMA device to assign packets to network processors in accordance with a mapping function which classifies packets based on its content, e.g., bits in one or more header fields. Preferably, the mapping function is implemented as a hash function, which uses a predetermined number of bits from packet as inputs. The result of this function specifies the processor to which the packet is assigned. To make implementation manageable in a high-traffic environment, each processor may be equipped with a queue, which holds pointer information. Such a pointer provides an indication of the area in memory where incoming packet resides. The network handler is particularly useful in a Fiber Channel environment, where the hash function may be implemented to assign all packets from the same sequence to the same processor, thereby resulting in improved processing efficiency.

Abstract: A user at a receiving Web station is provided with several alternate Web page display interface formats, from which the user may select the appropriate format for each Web document that he bookmarks. Thus, each time that a bookmarked Web document will be displayed subsequently, it will have this optimum presentation interface format. The implementation comprises bookmarking a received Web document, predetermining at least one display interface format alternate to said standard display interface format for bookmarked Web documents, providing a document folder associated with each alternate display interface format, enabling a user to put a bookmarked Web document into a document folder associated with an alternate display interface format and displaying bookmarked documents in said document folder in said alternate display interface format.

Abstract: A method for managing computer memory includes maintaining multiple sets of free blocks of memory wherein a free block is added to a set based on its size. In response to a request for a block of a request size, a set of blocks is searched for a free block which is at least as large as the request size but smaller than the request size plus a threshold. If such a block is found, the block is allocated in its entirety if such a free block is not found, a block at least as large as the request size maybe split and the request satisfied with the resulting split block. Methods for managing a block of contiguous persistent memory or storage and for coalescing adjacent free blocks using header information are also described.