Patents Assigned to International Business Machines Corporation (IBM)
-
Publication number: 20120001228Abstract: An example embodiment of a strained channel transistor structure comprises the following: a strained channel region comprising a first semiconductor material with a first natural lattice constant; a gate dielectric layer overlying the strained channel region; a gate electrode overlying the gate dielectric layer; and a source region and drain region oppositely adjacent to the strained channel region, one or both of the source region and drain region are comprised of a stressor region comprised of a second semiconductor material with a second natural lattice constant different from the first natural lattice constant; the stressor region has a graded concentration of a dopant impurity and/or of a stress inducing molecule. Another example embodiment is a process to form the graded impurity or stress inducing molecule stressor embedded S/D region, whereby the location/profile of the S/D stressor is not defined by the recess depth/profile.Type: ApplicationFiled: September 12, 2011Publication date: January 5, 2012Applicants: INTERNATIONAL BUSINESS MACHINES CORPORATION (IBM), GLOBALFOUNDRIES SINGAPORE PTE. LTD.Inventors: Yung Fu CHONG, Zhijiong LUO, Judson Robert HOLT
-
Publication number: 20110223737Abstract: Some example embodiments of the invention comprise methods for and semiconductor structures comprised of: a MOS transistor comprised of source/drain regions, a gate dielectric, a gate electrode, channel region; a carbon doped SiGe region that applies a stress on the channel region whereby the carbon doped SiGe region retains stress/strain on the channel region after subsequent heat processing.Type: ApplicationFiled: May 23, 2011Publication date: September 15, 2011Applicants: GLOBALFOUNDRIES SINGAPORE PTE. LTD., INTERNATIONAL BUSINESS MACHINES CORPORATION (IBM)Inventors: Jin Ping LIU, Judson Robert HOLT
-
Patent number: 7947546Abstract: Some example embodiments of the invention comprise methods for and semiconductor structures comprised of: a MOS transistor comprised of source/drain regions, a gate dielectric, a gate electrode, channel region; a carbon doped SiGe region that applies a stress on the channel region whereby the carbon doped SiGe region retains stress/strain on the channel region after subsequent heat processing.Type: GrantFiled: August 9, 2006Date of Patent: May 24, 2011Assignees: Chartered Semiconductor Manufacturing, Ltd., International Business Machines Corporation (IBM)Inventors: Jin Ping Liu, Judson Robert Holt
-
Patent number: 7718500Abstract: A structure and method for forming raised source/drain structures in a NFET device and embedded SiGe source/drains in a PFET device. We provide a NFET gate structure over a NFET region in a substrate and PFET gate structure over a PFET region. We provide NFET SDE regions adjacent to the NFET gate and provide PFET SDE regions adjacent to the PFET gate. We form recesses in the PFET region in the substrate adjacent to the PFET second spacers. We form a PFET embedded source/drain stressor in the recesses. We form a NFET S/D epitaxial Si layer over the NFET SDE regions and a PFET S/D epitaxial Si layer over PFET embedded source/drain stressor. The epitaxial Si layer over PFET embedded source/drain stressor is consumed in a subsequent salicide step to form a stable and low resistivity silicide over the PFET embedded source/drain stressor.Type: GrantFiled: December 16, 2005Date of Patent: May 18, 2010Assignees: Chartered Semiconductor Manufacturing, Ltd, International Business Machines Corporation (IBM), Samsung Electronics Co., Ltd.Inventors: Yung Fu Chong, Zhijiong Luo, Joo Chan Kim, Judson Robert Holt
-
Patent number: 7659174Abstract: A structure and method of fabrication of a semiconductor device having a stress relief layer under a stress layer in one region of a substrate. In a first example, a stress relief layer is formed over a first region of the substrate (e.g., PFET region) and not over a second region (e.g., NFET region). A stress layer is over the stress relief layer in the first region and over the devices and substrate/silicide in the second region. The NFET transistor performance is enhanced due to the overall tensile stress in the NFET channel while the degradation in the PFET transistor performance is reduced/eliminated due to the inclusion of the stress relief layer. In a second example embodiment, the stress relief layer is formed over the second region, but not the first region and the stress of the stress layer is reversed.Type: GrantFiled: October 31, 2007Date of Patent: February 9, 2010Assignees: Chartered Semiconductor Manufacturing, Ltd., International Business Machines Corporation (IBM)Inventors: Yong Meng Lee, Haining S. Yang, Victor Chan
-
Publication number: 20090282090Abstract: A method and system for migrating source data from one or more databases to a destination database, wherein the destination database is selected based on power consumption of the destination database. A data migration server determines which destination database should be selected by selecting a number of candidates and comparing the power consumed, the available space and the maximum monthly power consumption limit. A user intervention policy is created to evaluate which data should be moved to a destination database. A “payback period” is calculated to determine the amount of time that will elapse before savings are realized.Type: ApplicationFiled: May 8, 2008Publication date: November 12, 2009Applicant: International Business Machines Corporation (IBM)Inventors: Rick A. Hamilton, II, Jenny S. Li, Vivek Salve, Anne R. Sand, Elisabeth R. Stahl
-
Publication number: 20090282044Abstract: A method and system for provisioning data that has been collected and stored in a source database. The source database is a database that consumes a large amount of power and drains the company's database resources. The method and system determine which data should be provisioned and sent to a target server, the target server being more energy efficient than the source database and less exhausting of company resources. Various factors, such as the amount of data being requested and the frequency of change of the requested data, determine whether a transfer of data from the source database to the more energy efficient target database should be performed.Type: ApplicationFiled: May 8, 2008Publication date: November 12, 2009Applicant: International Business Machines Corporation (IBM)Inventors: Rick A. Hamilton, II, Jenny S. Li, Vivek Salve, Anne R. Sand, Elisabeth R. Stahl
-
Publication number: 20090281847Abstract: A method and system for migrating source data from a source database to a destination database based on energy efficiency and conservation. A migration server evaluates the source data for usage and requirements and defines data usage and requirement tags for the source data. The source data is disaggregated into one or more source data sets based on the data usage and requirement tags. The migration server then identifies candidate destinations for the source data, wherein each candidate destination has stored data identified with usage and requirement tags. The data migration server compares the first usage and requirement tags of the source data with the second usage and requirement tags of the stored data and identifies an optimal destination database based on the comparing step. The data migration server migrates the source data to the optimal destination database.Type: ApplicationFiled: May 8, 2008Publication date: November 12, 2009Applicant: International Business Machines Corporation (IBM)Inventors: Rick A. Hamilton, II, Jenny S. Li, Vivek Salve, Anne R. Sand, Elisabeth R. Stahl
-
Publication number: 20090282273Abstract: A method and system for migrating source data from one or more databases to a destination database, wherein the destination database is selected based on power consumption of the destination database. A data migration server determines which destination database should be selected by selecting a number of candidates and comparing the power consumed, the available space and the maximum monthly power consumption limit. A user intervention policy is created to evaluate which data should be moved to a destination database. A “payback period” is calculated to determine the amount of time that will elapse before savings are realized.Type: ApplicationFiled: May 8, 2008Publication date: November 12, 2009Applicant: International Business Machines Corporation (IBM)Inventors: Rick A. Hamilton, II, Jenny S. Li, Vivek Salve, Anne R. Sand, Elisabeth R. Stahl
-
Publication number: 20090216801Abstract: A method, system and computer program product comprising: locating an import target statement in a service document; locating a generic object associated with the service document; locating import target references; loading, when a unique import target reference is located, the located target object into an address in the repository; and resolving the source document target reference to point at this address.Type: ApplicationFiled: February 20, 2009Publication date: August 27, 2009Applicant: International Business Machines Corporation (IBM)Inventors: Timothy John Baldwin, John Colgrave, Bernard Zdzislaw Kufluk, James Robert Magowan
-
Patent number: 7572712Abstract: Embodiments for FET devices with stress on the channel region by forming stressor regions under the source/drain regions or the channel region and forming a selective strained Si using lateral epitaxy over the stressor regions. In a first example embodiment, a lateral epitaxial layer is formed over a stressor region under a channel region of an FET. In a second example embodiment, a lateral S/D epitaxial layer is formed over S/D stressor region under the source/drain regions of an FET. In a third example embodiment, both PFET and NFET devices are formed. In the PFET device, a lateral S/D epitaxial layer is formed over S/D stressor region under the source/drain regions. In the NFET device, the lateral epitaxial layer is formed over a stressor region under a channel region of the NFET.Type: GrantFiled: November 21, 2006Date of Patent: August 11, 2009Assignees: Chartered Semiconductor Manufacturing, Ltd., International Business Machines Corporation (IBM)Inventors: Yung Fu Chong, Zhijiong Luo, Judson R. Holt
-
Patent number: 7553400Abstract: A plating method is capable of mechanically and electrochemically preferentially depositing a plated film in fine interconnect recesses such as trenches and via holes, and depositing the plated film to a flatter surface. The plating method including: disposing a substrate having fine interconnect recesses such that a conductive layer faces an anode; disposing a porous member between the substrate and the anode; filling a plating solution between the substrate and the anode; and repeating a process of holding the conductive layer and the porous member in contact with each other and moving the conductive layer and the porous member relatively to each other, a process of passing an electric current between the conductive layer and the anode while keeping the conductive layer still with respect to the porous member, and a process of stopping the supply of the electric current between the conductive layer and the anode.Type: GrantFiled: December 21, 2004Date of Patent: June 30, 2009Assignees: Ebara Corporation, International Business Machines Corporation (IBM)Inventors: Mizuki Nagai, Hiroyuki Kanda, Keiichi Kurashina, Satoru Yamamoto, Ryoichi Kimizuka, Hariklia Deligianni, Brett Baker, Keith Kwietniak, Panayotis Andricacos, Phillipe Vereecken
-
Publication number: 20090030994Abstract: A method of generating a fingerprint of a bit sequence includes determining a relative occurrence frequency of each bit combination of a set of bit combinations in the bit sequence, wherein the set of bit combinations comprises all possible non-redundant sub-sequences of bits having at least one bit and at most a preset maximal number of bits. The method further includes determining for each bit combination of the set of bit combinations a difference value between the relative occurrence frequency of the bit combination and a random occurrence frequency, the random occurrence frequency relating to the expected random occurrence of the bit combination in the bit sequence. Moreover, the method includes allocating a set of bins, each bin of the set of bins being associated with a predetermined interval of difference values, each bin further relating to a bin value.Type: ApplicationFiled: May 13, 2008Publication date: January 29, 2009Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION (IBM)Inventor: Mark Usher
-
Publication number: 20090020851Abstract: A method of fabricating an heterojunction bipolar transistor (HBT) structure in a bipolar complementary metal-oxide-semiconductor (BiCMOS) process selectively thickens an oxide layer overlying a base region in areas that are not covered by a temporary emitter and spacers such that the temporary emitter can be removed and the base-emitter junction can be exposed without also completely removing the oxide overlying the areas of the base region that are not covered by the temporary emitter or spacers. As a result, a photomask is not required to remove the temporary emitter and to expose the base-emitter junction.Type: ApplicationFiled: December 21, 2006Publication date: January 22, 2009Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION (''IBM")Inventors: Qizhi Liu, Peter B. Gray, Alvin J. Joseph
-
Publication number: 20080313604Abstract: A system and method for declaring variables during coding of a software program. The method includes, for each variable type, defining a unique string representing a variable declaration instruction and adapting a coding module wherein, when a string representing a variable declaration instruction is typed adjacent to a new variable name, the coding module automatically generates code for the corresponding variable declaration statement for a new variable having the new variable name and the specified variable type. The method further includes defining a reserved variable declaration area in the software program and placing any code generated by the coding module for the variable declaration statement into the reserved variable declaration area. Each unique string representing a variable declaration instruction may be a prefix or suffix that may be typed adjacent to the new variable name.Type: ApplicationFiled: May 22, 2008Publication date: December 18, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION (IBM)Inventor: Greg Cowtan
-
Publication number: 20080295001Abstract: A system is provided which utilizes a threading service to offer enhanced features for a document management system including an email system. Various enhanced email features may be provided through one or more of the following components: a delete module, a reply module, a profile module, and a search module. The delete module enables a user to delete a selected message, a set of related messages, or the whole set except for the selected message. The reply module enables a user to send a reply message to all addresses associated and involved with an entire set of related messages. The profile module enables a dynamic interest profile to contain all relevant information from an outgoing message and a set of messages related to the outgoing message. The search module enables search results to include documents which match the user's query as well as documents related to the documents which match the user's query.Type: ApplicationFiled: July 2, 2008Publication date: November 27, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION (IBM)Inventors: Paul B. Moody, Daniel M. Gruen, Steven L. Rohall, Bernard J. Kerr
-
Publication number: 20080270391Abstract: A system are provided for enabling a user to search for documents that the user has previously viewed on its local machine. The system includes three main components: the desktop integration module, the index module, and the graphical user interface module. The desktop integration module is an application which monitors documents with which the user interacts for predetermined events, and obtains content data and metadata from the monitored documents. The index module indexes the content data and metadata received from the desktop integration module. The graphical user interface module then permits a user to utilize the desktop integration module and index module by allowing a user to search for a document.Type: ApplicationFiled: July 2, 2008Publication date: October 30, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION (IBM)Inventors: David L. Newbold, Tolga Oral, Andrew L. Schirmer, Martin M. Wattenberg, Michael Bolin
-
Patent number: 7405131Abstract: The example embodiments disclose devices and methods to prevent silicide strapping of the Source/Drain to Body in semiconductor devices with S/D stressor. We provide isolation regions in the substrate and a gate structure over the substrate. We form recesses in the substrate adjacent to the gate structure with disposable spacers and adjacent to the isolation regions. We provide stressor regions filling the recesses. The stress region can have a pit adjacent the isolation regions. We form stressor spacers at least partially in the pit on the sidewalls of the stressor regions. We form silicide regions over the stressor regions. The spacer on the stressor regions sidewalls inhibit the formation of silicide at the stressor region edge during the silicide process, thus preventing silicide strapping of the Source/Drain to Body.Type: GrantFiled: July 16, 2005Date of Patent: July 29, 2008Assignees: Chartered Semiconductor Manufacturing, Ltd., International Business Machines Corporation (IBM)Inventors: Yung Fu Chong, Brian Joseph Greene
-
Patent number: 7404726Abstract: An apparatus is disclosed that surrounds a connector and places it within the printer body in such away as to allow for the connector to float against the intrusion of a sliding can mounted with electronics and to set up and enable the printer. The problem solved is that of the blind-mating connectors within a printer system for which an industry standard connector set for flex cable must be used. It is advantageous to allow a connector that is attached to a flex cable to float even though the floating feature has not been considered in the original design and the connector was not made for the amount of misalignment present in a blind-mate connection. In addition, by a single-rib design, an extra degree of freedom for rotational around Y-axis is provided to the floating connector to further guide the lead-in of the contacting face of the mating connector.Type: GrantFiled: January 31, 2008Date of Patent: July 29, 2008Assignee: International Business Machines Corporation (IBM)Inventors: Dean Frederick Herring, William Lewis Talley, Danny Hugh Addison, Robert J. Heider
-
Publication number: 20080147833Abstract: A system and method of managing networks and, more particularly, to a system and method for interfacing with virtual networking devices using SNMP (Simple Network Management Protocol). A system comprises a configuration statement configured to provide an identity to a virtual device. An SNMP subagent is configured to interface between an SNMP agent and a control program of the virtual device. The SNMP subagent acquires information extracted by the control program for the identified virtual device and provides the acquired information to the SNMP agent to be returned to the SNMP client.Type: ApplicationFiled: December 13, 2006Publication date: June 19, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION ("IBM")Inventors: Tracy Jo ADAMS, Mary Ellen CAROLLO, Susan Marie FARRELL, Joseph Michael HUST, Angelo MACCHIANO, Dennis Ray MUSSELWHITE