Patents Assigned to International Business Machines Corporations
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Patent number: 12001837Abstract: Disclosed are techniques for two-way synchronization of infrastructure-as-code templates and instances, including a method comprising detecting changes to a run-time state of a system and, in response to detecting a change, triggering an update of a current run-time state model. The method may further comprise, in response to updating the run-time state model, comparing the updated model to a current model using a template in a local repository instantiated as the current model. The method may further comprise, in response to the comparison determining a structural difference between the updated model and the current model, merging the updated model and the current model into a new model; and updating a local clone of a repository of the template with the new model. The method may further comprise, in response to the comparison determining no structural difference between the updated model and the current model, pushing changes to a remote repository.Type: GrantFiled: March 18, 2022Date of Patent: June 4, 2024Assignee: International Business Machines CorporationInventors: Joseph Paul Wigglesworth, Miguel Angel Jimenez Achinte, Gabriel Tamura, Hans Albert Muller, Ian Fraser Watts, Hugh Edward Hockett
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Patent number: 12001328Abstract: A transient input/output in progress state is established during processing of a testcase by a test infrastructure in a computing environment. The method includes obtaining the testcase for an object having one or more pages, and processing the testcase by the test infrastructure. Processing the testcase by the test infrastructure includes, for a page of the object, generating a delay in the processing of the testcase for the page of the object. The delay opens a transient input/output in progress state during which one or more test operations reference the page of the object.Type: GrantFiled: April 5, 2023Date of Patent: June 4, 2024Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Robert Miller, Jr., Harris M. Morgenstern, Charles Eugene Mari, Christopher Lee Wood, Alfred Francis Foster
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Patent number: 12001896Abstract: Computer-implemented techniques for unsupervised event extraction are provided. In one instance, a computer implemented method can include parsing, by a system operatively coupled to a processor, unstructured text comprising event information to identify candidate event components. The computer implemented method can further include employing, by the system, one or more unsupervised machine learning techniques to generate structured event information defining events represented in the unstructured text based on the candidate event components.Type: GrantFiled: April 6, 2023Date of Patent: June 4, 2024Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Rajarshi Haldar, Yu Deng, Lingfei Wu, Ruchi Mahindru, Shu Tao
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Patent number: 12001405Abstract: Described are techniques for a tape unmounting protocol. The techniques include selecting a tape for unmounting from a plurality of tape drives, where the tape for unmounting includes a remaining capacity below a first threshold and a number of migrated files below a second threshold. The techniques further include unmounting the tape for unmounting from a tape drive.Type: GrantFiled: March 13, 2020Date of Patent: June 4, 2024Assignee: International Business Machines CorporationInventors: Tohru Hasegawa, Tsuyoshi Miyamura, Atsushi Abe, Shinsuke Mitsuma, Noriko Yamamoto, Sosuke Matsui
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Patent number: 12001864Abstract: Containerized software discover and identification can include discovering a plurality of container remnants by electronically scanning portions of computer memory of at least one computer system of one or more of computing nodes, the portions of computer memory being allocated to persistent storage of computer data, and each container remnant containing computer data providing a record of system-generated execution attributes generated in response to execution of one or more containerized applications. One or more inactive container remnants unutilized by a currently running containerized application can be identified among the plurality of container remnants. Each inactive container remnant can be categorized, the categorizing being based on system-generated execution attributes contained in each inactive container remnant.Type: GrantFiled: December 24, 2020Date of Patent: June 4, 2024Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Piotr P. Godowski, Michal Paluch, Tomasz Hanusiak, Szymon Kowalczyk, Andrzej Pietrzak
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Patent number: 12002370Abstract: A method for guiding an emergency vehicle to an emergency site includes receiving an emergency dispatch message including a location of an emergency. Present location information is received for an emergency vehicle. A route between the received present location and the received location of the emergency is calculated using area map data. Navigation guidance is provided to the emergency vehicle based on the calculated route. The calculated route and the present location information for the emergency vehicle are transmitted to an unmanned aerial vehicle (UAV). The UAV is automatically piloted ahead of the emergency vehicle, along the calculated route, using the calculated route and present location transmitted thereto. A traffic alert is transmitted from the UAV to influence traffic flow ahead of the emergency vehicle.Type: GrantFiled: January 23, 2020Date of Patent: June 4, 2024Assignee: International Business Machines CorporationInventors: Minkyong Kim, Clifford A. Pickover, Valentina Salapura, Maja Vukovic
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Patent number: 12001942Abstract: An apparatus includes a substrate, an array of channels disposed in the substrate, wherein first ends of the channels are exposed to an outside the apparatus, a material disposed in the channel that promotes growth of neural tissue, a plurality of electrodes disposed at second ends of the channels, wherein each channel is aligned with a respective one of the electrodes, and a chip electrically connected to the electrodes.Type: GrantFiled: December 22, 2017Date of Patent: June 4, 2024Assignee: International Business Machines CorporationInventors: Christopher F. Codella, James V. Codella, Noel C. Codella, Vince S. Siu
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Patent number: 12001859Abstract: Described are techniques for modifying existing driver plugin behavior using a plugin wrapper to enable driver compatibility with an unsupported container deployment model. The techniques include intercepting, by a plugin wrapper operating as part of a container orchestration system, an allocation request intended for a driver plugin, where the allocation request is for allocating a computing resource to a containerized application deployed using a container deployment model not supported by the driver plugin. The techniques further include modifying, by the plugin wrapper, the allocation request to correspond to specifications of the container deployment model, thereby forming a modified request to allocate the computing resource to the containerized application.Type: GrantFiled: November 10, 2022Date of Patent: June 4, 2024Assignee: International Business Machines CorporationInventors: Yohei Ueda, Da Li Liu, Qi Feng Huo, Lei Li
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Patent number: 12002850Abstract: A semiconductor structure includes a substrate, a first device disposed on the substrate and a second device disposed on the substrate. The first device includes a first plurality of nanosheets comprising a p-type material. The second device includes a second plurality of nanosheets comprising an n-type material. A dielectric isolation pillar is disposed between the first device and the second device.Type: GrantFiled: August 31, 2021Date of Patent: June 4, 2024Assignee: International Business Machines CorporationInventors: Kangguo Cheng, Julien Frougier, Ruilong Xie, Chanro Park
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Patent number: 12001863Abstract: Containerized software discover and identification can include discovering a plurality of container remnants by electronically scanning portions of computer memory of at least one computer system of one or more of computing nodes, the portions of computer memory being allocated to persistent storage of computer data, and each container remnant containing computer data providing a record of system-generated execution attributes generated in response to execution of one or more containerized applications. One or more inactive container remnants unutilized by a currently running containerized application can be identified among the plurality of container remnants. Each inactive container remnant can be categorized, the categorizing being based on system-generated execution attributes contained in each inactive container remnant.Type: GrantFiled: September 21, 2020Date of Patent: June 4, 2024Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Piotr P. Godowski, Michal Paluch, Tomasz Hanusiak, Szymon Kowalczyk, Andrzej Pietrzak
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Patent number: 12001950Abstract: Mechanisms are provided for implementing a generative adversarial network (GAN) based restoration system. A first neural network of a generator of the GAN based restoration system is trained to generate an artificial audio spectrogram having a target damage characteristic based on an input audio spectrogram and a target damage vector. An original audio recording spectrogram is input to the trained generator, where the original audio recording spectrogram corresponds to an original audio recording and an input target damage vector. The trained generator processes the original audio recording spectrogram to generate an artificial audio recording spectrogram having a level of damage corresponding to the input target damage vector. A spectrogram inversion module converts the artificial audio recording spectrogram to an artificial audio recording waveform output.Type: GrantFiled: March 12, 2019Date of Patent: June 4, 2024Assignee: International Business Machines CorporationInventors: Yang Zhang, Chuang Gan
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Patent number: 12001882Abstract: Technology for revising a smart contract, including a set of machine logic based rules for job management of jobs to be performed under an SLA (service level agreement). The machine learning algorithm is refined and optimized dynamically based on intermittently received context data (historical, relevant operational data—may be augmented with projections regarding future events and/or operations). Also, the SLA is self-evolving so that its terms also change based an analysis of the context data.Type: GrantFiled: June 15, 2021Date of Patent: June 4, 2024Assignee: International Business Machines CorporationInventor: Sarbajit K. Rakshit
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Patent number: 12001794Abstract: Methods, systems, and computer program products for zero-shot entity linking based on symbolic information are provided herein. A computer-implemented method includes obtaining a knowledge graph comprising a set of entities and a training dataset comprising text samples for at least a subset of the entities in the knowledge graph; training a machine learning model to map an entity mention substring of a given sample of text to one corresponding entity in the set of entities, wherein the machine learning model is trained using a multi-task machine learning framework using symbolic information extracted from the knowledge graph; and mapping an entity mention substring of a new sample of text to one of the entities in the set using the trained machine learning model.Type: GrantFiled: January 14, 2022Date of Patent: June 4, 2024Assignee: International Business Machines CorporationInventors: Dinesh Khandelwal, G P Shrivatsa Bhargav, Saswati Dana, Dinesh Garg, Pavan Kapanipathi Bangalore, Salim Roukos, Alexander Gray, L. Venkata Subramaniam
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Patent number: 12001343Abstract: A data processing system includes a plurality of processing nodes communicatively coupled to a system fabric. Each of the processing nodes includes a respective plurality of processor cores. Logical partition (LPAR) information for each of a plurality of LPARs is maintained in a register set in each of the processor cores, where the LPAR information indicates, for each of the LPARs, which of the processing nodes may hold an address translation entry for each LPAR. Based on the LPAR information, a first processor core selects a broadcast scope for a multicast request on the system fabric that includes fewer than all of the plurality of processing nodes and issues the multicast request with the selected broadcast scope. The first processor core updates the LPAR information in the register set of a second processor core in another of the plurality of processing nodes via an inter-processor interrupt.Type: GrantFiled: December 30, 2022Date of Patent: June 4, 2024Assignee: International Business Machines CorporationInventors: Derek E. Williams, Florian Auernhammer
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Patent number: 12002498Abstract: Embodiments of the invention include a semiconductor structure with a first magneto-resistive random access memory (MRAM) pillar with a bottom electrode layer, a reference layer connected above the bottom electrode layer, a free layer, and a tunnel barrier between the reference layer and the free layer. The MRAM pillar includes a pillar diameter. The semiconductor structure also includes a coaxial top electrode with a top diameter that is less than the pillar diameter.Type: GrantFiled: June 14, 2022Date of Patent: June 4, 2024Assignee: International Business Machines CorporationInventors: Oscar van der Straten, Koichi Motoyama, Chih-Chao Yang
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Patent number: 12002808Abstract: A forksheet transistor device includes a dual dielectric pillar that includes a first dielectric and a second dielectric that is different from the first dielectric. The dual dielectric pillar physically separates pFET elements from nFET elements. For example, the first dielectric physically separates a pFET gate from a nFET gate while the second dielectric physically separates a pFET source/drain region from a nFET source drain region. When it is advantageous to electrically connect the pFET gate and the nFET gate, the first dielectric may be etched selective to the second dielectric to form a gate connector trench within the dual dielectric pillar. Subsequently, an electrically conductive gate connector strap may be formed within the gate connector trench to electrically connect the pFET gate and the nFET gate.Type: GrantFiled: August 9, 2021Date of Patent: June 4, 2024Assignee: International Business Machines CorporationInventors: Ruilong Xie, Julien Frougier, Kangguo Cheng, Dimitri Houssameddine
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Patent number: 12002805Abstract: A method for forming a stacked transistor includes forming a sacrificial cap over a first interconnect of a lower level transistor. The method further includes forming an upper level transistor above the sacrificial cap. The method further includes removing the sacrificial cap to form an opening such that the opening is delimited by the upper level transistor. The method further includes forming a second interconnect in the opening such that the second interconnect is in direct contact with the first interconnect.Type: GrantFiled: August 13, 2021Date of Patent: June 4, 2024Assignee: International Business Machines CorporationInventors: Heng Wu, Ruilong Xie, Chen Zhang, Eric Miller
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Patent number: 12001774Abstract: A method for curing antenna violations on an integrated circuit that includes multiple levels includes: obtaining a design of a circuit, the design including a first element connected to first device and a second element connected to one or more second devices, wherein the first and second elements both receive a common signal; determining that an antenna violation exists in on the first element at a first level of the multiple levels; and modifying the design of the circuit to add a connected between the first element and the second element at the first layer or at a layer below the first layer.Type: GrantFiled: August 3, 2021Date of Patent: June 4, 2024Assignee: International Business Machines CorporationInventors: Amanda Christine Venton, Peter Milton Nasveschuk, Christopher Joseph Berry, Eric Chien Lai
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Patent number: 12002856Abstract: A method of forming a semiconductor structure includes forming a first array of mandrels on a hardmask layer disposed on an uppermost surface of a semiconductor substrate. First sidewall image transfer spacers are formed on opposing longitudinal sidewalls of each mandrel in the first array of mandrels. A second array of mandrels is formed on the hardmask layer. Each mandrel in the second array of mandrels is laterally separated from each mandrel in the first array of mandrels by the first sidewall image transfer spacers. Second sidewall image transfer spacers are formed on opposing transversal sidewalls of the first array of mandrels and the second array of mandrels. Portions of the second sidewall image transfer spacers are selectively removed to define a crosslink fin pattern to be transferred to the semiconductor substrate.Type: GrantFiled: March 7, 2023Date of Patent: June 4, 2024Assignee: International Business Machines CorporationInventors: Indira Seshadri, Ruilong Xie, Chen Zhang, Ekmini Anuja De Silva
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Patent number: 12001772Abstract: Semiconductor integrated circuit devices are provided which have standard cells with ultra-short standard cell heights. For example, a device comprises an integrated circuit comprising a standard cell which comprises a first cell boundary and a second cell boundary. The standard cell comprises an n-track cell height defined by a distance between the first cell boundary and the second cell boundary, wherein n is four or less.Type: GrantFiled: September 24, 2021Date of Patent: June 4, 2024Assignee: International Business Machines CorporationInventors: Albert Chu, Junli Wang, Brent Anderson