Patents Assigned to International Business Machines Corproation
  • Publication number: 20100325404
    Abstract: Updating programmable logic devices (‘PLDs’) in a symmetric multiprocessing (‘SMP’) computer, each compute node of the SMP computer including a PLD coupled for data communications through a bus adapter, the bus adapter adapted for data communications through a set of one or more input/output (‘I/O’) memory addresses, including configuring the primary compute node with an update of the configuration instructions for the PLDs; assigning, by the PLDs at boot time in an SMP boot, a unique, separate set of one or more I/O addresses to each bus adapter on each compute node; and providing, by the primary compute node during the SMP boot, the update to all compute nodes, writing the update as a data transfer to each of the PLDs through each bus adapter at the unique, separate set of one or more I/O addresses for each bus adapter.
    Type: Application
    Filed: June 17, 2009
    Publication date: December 23, 2010
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPROATION
    Inventors: Alfredo Aldereguia, Grace A. Richter, William B. Schwartz
  • Patent number: 7706521
    Abstract: The present invention discloses a contact center system based upon open standards. The contact center system can include at least one agent node, a portal server, and an application server. An agent node can include a standard HTTP browser that communicates over a standard Internet Protocol network using standard protocols. The portal server can be configured to communicate with an agent node via an agent portal, which can consist of multiple agent portlets to present information. The application server can be configured to execute contact center applications that can collect and distribute information via the agent portlets and transfer calls to agents.
    Type: Grant
    Filed: March 9, 2007
    Date of Patent: April 27, 2010
    Assignee: International Business Machines Corproation
    Inventors: Brett J. Gavagni, Baiju D. Mandalia, Victor S. Moore, Wendi L. Nusbickel
  • Publication number: 20100070734
    Abstract: Managing resource reclamation in data storage systems is provided. A volume deletion metadata recorder records metadata for one or more deleted volumes. A policy engine, responsive to a predetermined policy rule, applies the policy rule to the metadata. The policy engine initiates policy-controlled data storage space reclamation for the one or more deleted volumes. A volume reclaimer, responsive to the policy engine, reclaims data storage space from the one or more deleted volumes. A resource allocator allocates the data storage space to satisfy a minimum requirement for available zeroed extents that comprise a minimum requirement to satisfy needs of late allocated storage volumes.
    Type: Application
    Filed: November 8, 2007
    Publication date: March 18, 2010
    Applicant: International Business Machines Corproation
    Inventors: John P. Agombar, Christopher B. Beeken, Carlos F. Fuente, Simon Walsh
  • Patent number: 7643591
    Abstract: A method for noise comprising synthesizing blocks of sequential latches, e.g., a pipeline circuit architecture or clocking domain, which comprises combinational logic, synthesizing a root or a master clock and at least one phase-shifted sub-domain clock for each block, assigning primary inputs and primary outputs of the block to the root clock, assigning non-primary inputs and non-primary outputs of the block to the sub-domain clock, splitting root clock inputs into root clock inputs and phase-shifted sub-domain clock inputs, assigning each of the blocks a different phase-shifted sub-domain clock phase offset, creating a clock generation circuitry for the root clocks and the phase-shifted sub-domain clocks.
    Type: Grant
    Filed: July 26, 2006
    Date of Patent: January 5, 2010
    Assignee: International Business Machines Corproation
    Inventors: Igor Arsovski, Serafino Bueti, Joseph A. Iadanza, Jason M. Norman, Hemen R. Shah, Sebastian T. Ventrone
  • Patent number: 7507633
    Abstract: A method for implementing alignment of a semiconductor device structure includes forming first and second sets of alignment marks within a lower level of the structure, the second set of alignment marks adjacent the first set of alignment marks. An opaque layer is formed over the lower level, including the first and second sets of alignment marks. A portion of the opaque layer corresponding to the location of said first set of alignment marks is opened so as to render the first set optically visible while the second set of alignment marks initially remains covered by the opaque layer. The opaque layer is patterned using the optically visible first set of alignment marks, wherein the second set of alignment marks remain available for subsequent alignment operations in the event the first set becomes damaged during patterning of the opaque layer.
    Type: Grant
    Filed: March 7, 2006
    Date of Patent: March 24, 2009
    Assignee: International Business Machines Corproation
    Inventors: Sivananda K. Kanakasabapathy, David W. Abraham
  • Patent number: 7467398
    Abstract: The present invention is an apparatus and method for allowing a user to search for specific content across many television channels in order to locate desirable television shows related to the searched content. Multiplexed cable signals flow thorough a logical unit which buffers text associated with the voice stream of each station via the pre-encoded closed-captioning signal or through the real-time voice translation within the logical unit. The user then enters search terms through one of a variety of different input devices. Upon entry of the search terms, the logical unit will compare the entered term with those available keywords stored in each buffer. Lexical parsing associates terms which may differ from plural to singular forms, or in tense. Additionally, synonym comparisons may be made. The logical unit will return a list of matches for the search criteria and allows the user the option of going directly to the television program.
    Type: Grant
    Filed: March 21, 2002
    Date of Patent: December 16, 2008
    Assignee: International Business Machines Corproation
    Inventors: Craig William Fellenstein, Doreen Galli, Rick Allen Hamilton, II
  • Patent number: 7447062
    Abstract: A memory structure, includes: an array of individual memory cells arranged in a network of bit lines and word lines, each individual memory cell further comprising a resistive memory device that is capable of being programmed to a plurality of resistance states, each of the resistive memory devices coupled to one of the bit lines at a first end thereof; a rectifying element in series with each of the resistive memory devices at a second end thereof; an access transistor associated with each of the individual memory cells, the access transistors activated by a signal applied to a corresponding one of the word lines, with each access transistor connected in series with a corresponding rectifying element; and a common connection configured to short neighboring rectifying devices together along a word line direction, in groups of two or more.
    Type: Grant
    Filed: March 15, 2007
    Date of Patent: November 4, 2008
    Assignee: International Business Machines Corproation
    Inventors: Geoffrey W. Burr, Kailash Gopalakrishnan
  • Patent number: 7444547
    Abstract: A system, method, and product are disclosed for testing multiple threads simultaneously. The threads share a real memory space. A first portion of the real memory space is designated as exclusive memory such that the first portion appears to be reserved for use by only one of the threads. The threads are simultaneously executed. The threads access the first portion during execution. Apparent exclusive use of the first portion of the real memory space is permitted by a first one of the threads. Simultaneously with permitting apparent exclusive use of the first portion by the first one of the threads, apparent exclusive use of the first portion of the real memory space is also permitted by a second one of the threads. The threads simultaneously appear to have exclusive use of the first portion and may simultaneously access the first portion.
    Type: Grant
    Filed: June 19, 2003
    Date of Patent: October 28, 2008
    Assignee: International Business Machines Corproation
    Inventors: Luai A. Abou-Emara, Jen-Yeu Chen, Ronald Nick Kalla
  • Publication number: 20080162771
    Abstract: A circuit arrangement for bus arbitration alters the sequence in which device requests are arbitrated with respect to each other and to a previous arbitration sequence. To this end, an arbiter grants access to a first group of devices according to a predetermined sequence. The arbiter then automatically alters the sequence for a second group of devices, granting access to the bus for the second group according to the altered sequence. These features allow the order in which the arbiter sequences through the groups to be automatically varied with respect to each other, diminishing the likelihood of lockout.
    Type: Application
    Filed: March 14, 2008
    Publication date: July 3, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPROATION
    Inventor: Richard Nicholas
  • Publication number: 20080141210
    Abstract: An apparatus and program product automatically back annotate a functional definition of a circuit design based upon the physical layout generated from the functional definition. A circuit design may be back annotated, for example, by generating a plurality of assignments between a plurality of circuit elements in the circuit design and a plurality of signals defined for the circuit design using a physical definition of the circuit design that has been generated from the functional definition, and modifying the functional definition of the circuit design to incorporate the plurality of assignments into the functional definition.
    Type: Application
    Filed: February 15, 2008
    Publication date: June 12, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPROATION
    Inventors: Mark S. Fredrickson, Glen Howard Handlogten, Chad B. McBride
  • Patent number: 7104081
    Abstract: System and method are provided for removing condensate from an air-to-liquid heat exchanger of a combined air/liquid enclosed apparatus for cooling rack-mounted electronic equipment. The condensate removal system includes a condensate collector for collecting liquid condensate from the air-to-liquid heat exchanger, and a vaporizing chamber in fluid communication with the condensate collector for receiving collected liquid therefrom. An actively controlled vaporizer vaporizes collected liquid within the vaporizing chamber and a vapor exhaust is in communication with the vaporizing chamber for venting vapor from the vaporizing chamber outside the cabinet containing the combined air/liquid cooling apparatus and rack-mounted electronic equipment.
    Type: Grant
    Filed: March 30, 2004
    Date of Patent: September 12, 2006
    Assignee: International Business Machines Corproation
    Inventors: Richard C. Chu, Michael J. Ellsworth, Jr., Roger R. Schmidt, Robert E. Simons
  • Publication number: 20060190708
    Abstract: A new zSeries floating-point unit has a fused multiply-add dataflow capable of supporting two architectures and fused MULTIPLY and ADD and Multiply and SUBTRACT in both RRF and RXF formats for the fused functions. Both binary and hexadecimal floating-point instructions are supported for a total of 6 formats. The floating-point unit is capable of performing a multiply-add instruction for hexadecimal or binary every cycle with a latency of 5 cycles. This supports two architectures with two internal formats with their own biases. This has eliminated format conversion cycles and has optimized the width of the dataflow. The unit is optimized for both hexadecimal and binary floating-point architecture supporting a multiply-add/subtract per cycle.
    Type: Application
    Filed: April 18, 2006
    Publication date: August 24, 2006
    Applicant: International Business Machines Corproation
    Inventors: Eric Schwarz, Ronald Smith
  • Publication number: 20060101072
    Abstract: A system, method and program product for interpreting scan data. A system is provided that includes: an input system for inputting scan data and associated subject data; a geographic information system (GIS) for generating spatial data from the scan data and allows for the mathematical integration of layered spatial data, and for calculating image attributes from the spatial data; a relational database for storing integrated attribute data from a plurality of subjects, wherein the integrated attribute data includes subject data and image attributes; and an analysis tool for interpreting image attributes of inputted scan data by identifying similar image attributes from the integrated attribute data stored in the relational database.
    Type: Application
    Filed: October 21, 2004
    Publication date: May 11, 2006
    Applicant: International Business Machines Corproation
    Inventors: Frederick Busche, Robert Angell, Alexander Zekulin
  • Patent number: 6925154
    Abstract: Techniques for providing an automated conversational name dialing system for placing a call in response to an input by a user. One technique begins with the step of analyzing an input from a user, wherein the input includes information directed to identifying an intended recipient of a telephone call from the user. At least one candidate for the intended recipient is identified in response to the input, wherein the at least one candidate represents at least one potential match between the intended recipient and a predetermined vocabulary. A confidence measure indicative of a likelihood that the at least one candidate is the intended recipient is determined, and additional information is obtained from the user to increase the likelihood that the at least one candidate is the intended recipient, based on the determined confidence measure.
    Type: Grant
    Filed: May 3, 2002
    Date of Patent: August 2, 2005
    Assignee: International Business Machines Corproation
    Inventors: Yuqing Gao, Bhuvana Ramabhadran, Chengjun Julian Chen, Hakan Erdogan, Michael A. Picheny
  • Patent number: 6030855
    Abstract: A semiconductor structure includes a stack of two semiconductor chips. An edge of the chips forms a side surface of the stack. Insulation and adhesive is located between the chips, and a wire contacting circuitry on one of the chips extends through the insulation to the side surface. A first conductor contacts the wire on the side surface. The first conductor is self-aligned to the wire and extends above the side surface. The first conductor facilitates pads or connectors on the side surface that are insulated from the semiconductor chips. The self-aligned first conductor is an electroplated or electroless plated metal.
    Type: Grant
    Filed: February 8, 1999
    Date of Patent: February 29, 2000
    Assignee: International Business Machines Corproation
    Inventors: Claude L. Bertin, Thomas G. Ference, Wayne J. Howell
  • Patent number: 6027660
    Abstract: A method of patterning a ceramic slider by plasma etching is disclosed. The ceramic slider contains alumina and titanium carbide. The method includes the steps of forming an etch pattern by depositing and developing a photoresist on the ceramic slider, and reactive ion etching a first surface on the ceramic slider using an etchant gas. The etchant gas generally includes argon, and a fluorine containing gas. The power source density, during etching ranges from about 0.5 W/(cm.sup.2) to 8 W/(cm.sup.2). Another aspect of the invention is a ceramic slider resulting from the method of the invention having a smoothness ranging from about 20 to 300 .ANG. as measured by atomic force microscopy.
    Type: Grant
    Filed: May 11, 1998
    Date of Patent: February 22, 2000
    Assignee: International Business Machines Corproation
    Inventors: Richard Hsiao, Cherngye Hwang, Son Van Nguyen, Diana Perez
  • Patent number: 6016146
    Abstract: A method and apparatus for enhancing template manipulation and creation in a graphical user interface. The user can create numerous additional templates from an existing object, template, or "generic" template. The method includes the computer-implemented steps of positioning a copy of at least one object into a template area pane and creating at least one template in the template area pane from that copied object. The apparatus includes a processor, a display device, pointing device, a template area pane displayed on the display device, at least one object which is positioned into the template area pane. The template area pane creates at least one template from the object and displays that template in the template area pane.
    Type: Grant
    Filed: July 27, 1994
    Date of Patent: January 18, 2000
    Assignee: International Business Machines Corproation
    Inventors: John Carl Beer, Mark Tweed Bowman, Georgia Ann Gibson, John Lovgren, Marianne Poythress Radding, Julieta Kaoru Yamakawa
  • Patent number: 5745385
    Abstract: A system and method for simulating a mechanistic kinetic process, such as a chemical process including one or more chemical reactions, over a predetermined time period, subject to a programmed temperature variation, is provided. The simulation proceeds stochastically, by taking discrete time steps through the time period. The time steps vary in size, based on instantaneous reaction rate values for the reactions taking place. Reaction rates can vary by many orders of magnitude, and sometimes a stochastically calcualated time step will be so great that it might skip over a later increase in chemical activity. To avoid loss of accuracy and control of the simulation due to such excessively large time steps, when the stochastically determined time step exceeds a threshold, one or more smaller, deterministic time steps are made. The deterministic time steps "inch" forward in time, until an increase in chemical activity is detected. Then, stochastic time steps are resumed.
    Type: Grant
    Filed: April 25, 1994
    Date of Patent: April 28, 1998
    Assignee: International Business Machines Corproation
    Inventors: William Dinan Hinsberg, III, Frances Anne Houle
  • Patent number: 5329257
    Abstract: This invention is a three layer Si.sub.x Ge.sub.1-x structure formed on a silicon substrate in which a thin, lightly doped Si.sub.x Ge.sub.1-x layer is formed between two heavily doped Si.sub.x Ge.sub.1-x layers. The incorporation of at least 10% germanium in the silicon provides for intervalley scattering of carriers in the conduction band of the Si.sub.x Ge.sub.1-x layers. This intervalley scattering leads to the negative differential conductance necessary for transferred electron device (TED) operation. Additionally, the lightly doped Si.sub.x Ge.sub.1-x layer is made very thin, on the order of 2,000 to 7,000 Angstroms, and the current flow through the this layer is vertical so that a high electric field can be placed across the lightly doped layer without applying a high voltage across the lightly doped layer. The lightly doped layer can be made thin even though it is interposed between two heavily doped layers because the growth of the in-situ doped Si.sub.x Ge.sub.
    Type: Grant
    Filed: April 30, 1993
    Date of Patent: July 12, 1994
    Assignee: International Business Machines Corproation
    Inventor: Khaled E. Ismail