Abstract: A system and method are provided that include determining optimum memory organization in an electronic device, wherein further determined are optimum resource interconnection patterns. One aspect of the system and method includes determining resource, e.g., memories and data paths, interconnection patterns of complex bus structures with switches using system-level information about the data-transfer conflicts. The quantity of memories within an electronic device, the size of the memories and the interconnection between the memories, including the interconnection of the memories with one or more data paths, defines a memory organization of an electronic device. Another aspect of the system and method relates to selecting an optimized memory organization, including selecting an optimized interconnection pattern between the memories and between the memories and the data paths.

Abstract: A formalized method and a design system are described for part of the design decisions, related to memory, involved while designing an essentially digital device. The method and system determine an optimized memory organization starting from a representation of said digital device, the representation describing the functionality of the digital device and comprising data access instructions on basic groups, which are groups of scalar signals. The method and system determine optimized scheduling intervals of said data access instructions such that execution of said functionality with the digital device is guaranteed to be within a predetermined cycle budget, the determining of the optimized scheduling intervals comprising optimizing access conflicts with respect to an evaluation criterion related to the memory cost of said digital device. An optimized memory organization is selected in accordance with the optimized scheduling intervals and the optimized access conflicts.