Abstract: An apparatus for traffic management in a telecommunications network, wherein, through said telecommunications network (TLC), data are exchanged by means of at least one software application, includes: a first module configured for acquiring first traffic information (INFO1), at application level, relating to the data traffic exchanged through the at least one application; a second module configured for acquiring second traffic information (INFO2), at network level, relating to the data traffic exchanged through said telecommunications network (TLC); a control module configured for generating output signals (OUT) for managing resources of said telecommunications network (TLC) for the data traffic as a function of said first information (INFO1) and said second information (INFO2).

Abstract: The invention relates to a method of routing or compressing packets destination address through an electronic routing or compressing device, the packets destination address being n bit packets and having address indicative of a desired destination, the address being classless, the routing device having at least a data base of prefix entries, each of which containing entries corresponding to a desired output data link, the method having the steps of: a) generating an address mask until an entry matching a masked address obtained by making an AND operation between the packets destination address and the address mask, is found in the data; the address mask having a number of bit equal to that of the packets destination address and having, starting from the most significant n-bit equal to 1 and the remaining i bit equal to 0, with 0<=u<=b.

Abstract: A distributed interface between a microprocessor or a standard bus and user macro-cells belonging to an ASIC, FPGA, or similar silicon devices includes a main module connected to the microprocessor bus on one side and to a COMMON-BUS inside the interface on which a cluster of peripheral modules is appended on the other side. Peripheral modules are also connected to the user macro-cells through multiple point-to-point buses to transfer signals in two directions. A set of hardware and firmware resources such as registers, counters, synchronizers, dual port memories (e.g. RAM, FIFO) either synchronous or asynchronous with respect to macro-cells clock is encompassed in each peripheral module. Subsets of the standard resources are diversely configured in each peripheral module in accordance with specific needs of the user macro-cells.

Abstract: The invention concerns an automated method to generate the Cyclic Redundancy Check, or CRC, of data packets, minimizing computing time, particularly for the transmission of recursively embedded packets in packet-switching networks, particularly able to carry out the calculation even in case the packet length (as number of bits) is not a multiple integer of processed word width. The invention also concerns the CRC and checksum checking and computing machines carrying out the described calculation.

Abstract: A clock signal generation and distribution system for a prototyping apparatus of an electronic system comprises at least one clock signal generation and distribution subsystem for distributing at least one clock signal to the prototyped electronic system implemented by the prototyping apparatus through a clock signal distribution network of the prototyping apparatus. The at least one clock signal generation and distribution subsystem comprises a clock source selector for selecting the at least one clock signal to be distributed to the prototyped electronic system among a group of source clock signals, the group including at least one first source clock signal derived from the prototyped electronic system and at least one second source clock signal not derived from the prototyped electronic system.

Abstract: A distributed interface between a microprocessor or a standard bus and user macro-cells belonging to an ASIC, or FPGA, or similar silicon devices includes a main module connected to the microprocessor bus on one side and to a COMMON-BUS inside the interface on which a cluster of peripheral modules is appended on the other side. Peripheral modules are also connected to the user macro-cells through as multiple point-to-point buses to transfer signals two directions. A set of hardware and firmware resources such as registers, counters, synchronizers, dual port memories (e.g. RAM, FIFO) either synchronous or asynchronous with respect to macro-cells clock is encompassed in each peripheral module. Subsets of the standard resources are diversely configured in each peripheral module in accordance with specific needs of the user macro-cells.

Abstract: A daughter board (405) is provided for a prototyping system (100). The daughter board includes a first surface for facing a mother board (115) of the prototyping system, and a second surface opposed thereto. The daughter board further includes a connector (410) for a corresponding socket (210) of the mother board arranged on the first surface. The connector includes multiple elements (410t-410b), each one including an insulating support and multiple leads. The daughter board also includes multiple contacts (482) for corresponding functional terminals of a programmable device (420) arranged on the second surface. Each contact is connected to a corresponding lead (476) of the connector. The elements of the connector are arranged along the edges of a regular polygon.

Abstract: The invention concerns an automated method to generate the Cyclic Redundancy Check, or CRC, of data packets, minimizing computing time, particularly for the transmission of recursively embedded packets in packet-switching networks, particularly able to carry out the calculation even in case the packet length (as number of bits) is not a multiple integer of processed word width. The invention also concerns the CRC and checksum checking and computing machines carrying out the described calculation.

Abstract: External cavity laser with reflector in optical wave guide, particularly HDBR laser, with an active element comprising a semiconductor optical amplifying cavity having a low-reflectivity facet (3), for example a Semiconductor Optical Amplifier (SOA) with a facet (30) opposite to said low-reflectivity facet treated with a reflecting coating, or a Fabry-Perot laser, and an external reflector comprising a Bragg grating (70 ) formed in an optical wave guide (4) near a termination (5), facing said facet, of a segment (5, 6, 7) of said optical wave guide coupled with the facet. The grating has a spatial profile of modulation of the refraction index such that a corresponding optical reflectivity spectrum (A) has an optical bandwidth (W) sufficiently small around a prescribed laser oscillation mode wavelength (&ggr;c) for the laser to oscillate only on the prescribed mode and not on other oscillation modes even in conditions of high-frequency direct modulation.

Abstract: It is disclosed an algorithm able to compress a defined set of addresses S, the set of addresses to be compressed, belonging to the set U, the whole addressing space; for each of these addresses the algorithm must identify one and only one address belonging to C, the set of compressed address (i.e. perform a transformation S→C). The algorithm may be implemented using some low-cost random access memories (RAM) and some control logic. A performance comparison shows that is possible to perform the address compression using one order of magnitude less memory respect to the state-of-the-art techniques. Basically, the method of the invention combines the splitting of the incoming address space (U) into a plurality of sub-spaces, a tree search algorithm for clustering a defined set (S) of identifiers contained in the sub-spaces into which the incoming addresses space (U) has been split and a sequential search performed within the right cluster in order to identify the compressed address belonging to space C.

Abstract: There are described a procedure and circuit for adaptive compensation of the gain distortions caused by thermal drift, ageing, etc., in microwave amplifiers connected to predistortion linearizers. The procedure concerns digitally modulated signals, e.g., QAM, in which the peak to average power signal ratio is constant. Since this ratio remains constant after amplification only if the amplifier is linear, it is measured at the amplifier output, to change the AM/FM distortion characteristic of the linearizer/amplifier chain and hold the ratio on the output equal to that on the input.

Abstract: A rectangular waveguide energized in the TE.sub.10 mode is externally provided on at least one of its major surfaces with one or more pairs of ferrite cores rising from that surface on opposite sides of its electric plane, an end face of each ferrite core being aligned with an aperture in the guide surface whereby two counterrotating magnetic fields in the interior of the guide induce corresponding fields in the two cores. The induced magnetic fields travel outward in the cores and are reflected at their remote ends for return to the guide with a phase shift controlled by a unipolar biasing current traversing a pair of coils which are respectively wound about these cores to generate two mutually opposite magnetic fields therein. The cores and their coils may be spacedly surrounded by an enclosure for the forced circulation of a cooling fluid therearound.

Abstract: A coaxial cable of the type comprising a litz wire with individually enameled strands as an inner conductor and a wire plait as an outer conductor is spliced to a coaxial connector by exposing a top of the inner conductor and stripping part of the insulation from the outer conductor to expose a portion thereof set back from the tip of the inner conductor. Before splicing, the stripped cable extremity is immersed in a solvent for the enamel such as sulfuric acid, then subjected to ultrasonic vibration in a bath containing alcohol or fluorinated hydrocarbons, and thereafter immersed in a solution of tin. After neutralization and drying, the conductor portions so treated are joined to corresponding conductors of the coaxial connector whereupon a sleeve is placed around the joint and crimped to secure the connector to the cable.