Abstract: An LED lamp is provided in which the output light intensity of the LEDs in the LED lamp is adjusted based on the input voltage to the LED lamp. The LED lamp comprises one or more LEDs, and an LED driver configured to receive an input voltage and provide regulated current to said one or more LEDs, where the LED driver is configured to adjust the regulated current to said one or more LEDs according to the input voltage to adjust the output light intensity of said one or more LEDs. The LED lamp can be a direct replacement of conventional incandescent lamps in typical wiring configurations found in residential and commercial building lighting applications that use conventional dimmer switches that carry out dimming by changing the input voltage to the LED lamp.

Abstract: A start-up circuit in a switch-mode power converter that employs a Zener diode to provide a reference voltage to reduce the power consumption and the size of the start-up circuit. The start-up circuit also includes a coarse current source and a coarse reference voltage signal generator for producing current and reference voltage for initial startup operation of a bandgap circuit. The reference signal and current from coarse current source and the reference voltage signal generator are subject to large process, voltage and temperature (PVT) variations or susceptible to noise from the power supply, and hence, these signals are used temporarily during start-up and replaced with signals from higher performance components. After bandgap circuit becomes operational, the start-up receives voltage reference signal from the bandgap circuit to more accurately detect undervoltage lockout conditions.

Abstract: An LED driver includes at least two interlocked closed feedback loops. One feedback loop controls the duty cycle of the on/off times of a switch connected in series to the LED string, and the other feedback loop controls the duty cycle of the on/off times of a power switch in the switching power converter that provides a DC voltage applied to the LED string. The LED driver of the present invention achieves fast control of the LED brightness and current sharing among multiple LED strings simultaneously in a power-efficient and cost-efficient manner.

Abstract: A controller integrated circuit (IC) for controlling a power converter uses its input voltage pin with a plurality of functions, including receiving an input voltage to the power converter, charging an external startup capacitor through charging circuitry coupled internally to the input voltage pin, and also receiving a test signal for programming a programmable resistance in an input voltage scale down circuitry coupled to the input voltage pin. Use of the input voltage pin with a plurality of functions reduces the number of pins required in the controller IC, thereby reducing the cost of manufacturing the controller IC.

Abstract: A switch controller compensates the total on-time delay of the switch in a switching power converter. The intended on-time of the switching transistor for the present switching cycle is reduced by the time difference between the actual on-time and the intended on-time of the switching transistor in the previous switching cycle in the switching power converter. The total delay of the switch in the switching power converter, including propagation delay, switch turn-on delay, and switch turn-off delay, can be compensated in real time, cycle by cycle.

Abstract: An LED lamp is provided in which the output light intensity of the LEDs in the LED lamp is adjusted based on the input voltage to the LED lamp. A dimmer control unit detects a type of dimmer switch during a configuration process. Using the detected dimmer type, the dimmer control unit generates control signals appropriate for the detected dimmer type to provide regulated current to the LEDs and to achieve the desired dimming effect. The LED lamp can be a direct replacement of conventional incandescent lamps in typical wiring configurations found in residential and commercial building lighting applications that use conventional dimmer switches.

Abstract: In a switching power converter, PWM mode and PFM mode are separated into two independent control sections with the control voltage range in each control section determined independently. Each of the PWM and PFM modulation modes cannot operate continuously beyond its boundaries, thereby forming a control gap between the two control sections within which no continuous operation is allowed. In order to supply a load condition within the control gap, the power supply operates at the two boundaries of the control gap. Transition between PWM and PFM modes occurs fast, with low output voltage ripple. No limitation needs to be imposed on the control voltage range in each of the PWM and PFM control sections, because the control parameters in the PWM and PFM control sections need not be matched to one another, due to separation of the PWM and PFM modes by the control gap.

Abstract: A method and system of system-on-chip design that provides the benefits of reduced design time, a smaller die size, lower power consumption, and reduced costs in chip design and production. The process seeks to remove the worst performance and worst power case scenarios from the design and application phases. This is accomplished by planning the power supply voltage in the design phase along with its tolerance with process corner and temperature combinations. The established plan is then applied with communications between power supply integrated circuits and load system-on-chip.

Abstract: A switching power converter detects low load conditions based on the ratio of a first peak current value for peak current switching in constant voltage regulation mode to a second peak current value for peak current switching in constant current regulation mode. The power supply load is considered to have a low load if the ratio is lower than a predetermined threshold. Once a low load condition is detected, the switching frequency of the switching power converter is reduced to a level that minimizes switching loss in the power converter. In addition, the switching power converter also adjusts the switching frequency according to the sensed input line voltage. An offset is added to the switching period to reduce the switching frequency of the switching power converter, as the input line voltage is increased.

Abstract: A switching power converter comprises a transformer (110), a switch (108) coupled to the transformer (110), and a switch controller (200) coupled to the switch (108) for generating a switch drive signal (207) to turn on or off the switch (108). The drive current of the switch drive signal (207) is adjusted dynamically according to line or load conditions within a switching cycle and/or over a plurality of switching cycles. The magnitude of the drive current can be dynamically adjusted within a switching cycle and/or over a plurality of switching cycles, in addition to the pulse widths or pulse frequencies of the drive current.

Abstract: In a switching power converter, no-load condition is detected based on a variety of parameters including the output current, primary current, transformer reset time, and switching period. Once the no-load condition is detected, the switching power converter enters stand-by mode, in which the reference voltage corresponding to the target regulated output voltage of the switching power converter is lowered to a low stand-by value or the switching power converter is shut down for a predetermined duration. As a result, power loss during the stand-by mode of the switching power converter can be reduced significantly.

Abstract: A switch controller compensates the total on-time delay of the switch in a switching power converter. The intended on-time of the switching transistor for the present switching cycle is reduced by the time difference between the actual on-time and the intended on-time of the switching transistor in the previous switching cycle in the switching power converter. The total delay of the switch in the switching power converter, including propagation delay, switch turn-on delay, and switch turn-off delay, can be compensated in real time, cycle by cycle.

Abstract: Adaptive multi-mode digital control schemes that improve the light-load efficiency (and thus the overall average efficiency) in switch-mode power converters without causing performance issues such as audible noises or excessive voltage ripples. Embodiments include a switch-mode power converter that reduces current in the power converter using a second pulse-width-modulation (PWM) mode before reaching switching frequencies that generate audible noises. As the load across the output of the power converter is reduced, the power converter transitions from a first PWM mode in high load conditions to a first pulse-frequency-modulation (PFM) mode, then to a second PWM mode, and finally to a second PFM mode. During the second PFM mode, the switching frequency is dropped to audible frequency levels. Current in the power converter, however, is reduced in the second PWM mode before transitioning to the second PFM mode.

Abstract: An improved valley-mode switching (VMS) scheme and circuitry for implementing the improved VMS switching scheme in a switch-mode power converter are disclosed. For a given switching cycle, a desired switch turn-on time is determined based on a pulse width modulation, pulse frequency modulation, or other suitable power converter control scheme. Also, one or more times corresponding to local minimums (valleys) are predicted for the voltage across a power switch of the switching power converter. The power switch is turned on at a valley immediately subsequent or otherwise subsequent to the desired switch time determined according to the power converter control scheme. Thus, the improved VMS scheme enables low-voltage switch operation to reduce switching loss and EMI noise without restricting the control scheme of the power converter.

Abstract: A controller of an AC/DC flyback switching power supply uses adaptive digital control approaches to control the switching operation of a BJT power switch based on primary-side feedback to regulate the secondary-side constant output voltage and output current, without using the input line voltage. Switching-cycle by switching-cycle peak current control and limit are achieved based on the sensed primary-side current rather than the input line voltage in both constant-voltage and constant-current modes, operating in PWM, PFM and/or combinations of a plurality of PWM and PFM modes. The controller IC does not need a separate pin and ADC circuitry for sensing the input line voltage.

Abstract: A method and system of system-on-chip design that provides the benefits of reduced design time, a smaller die size, lower power consumption, and reduced costs in chip design and production. The process seeks to remove the worst performance and worst power case scenarios from the design and application phases. This is accomplished by planning the power supply voltage in the design phase along with its tolerance with process corner and temperature combinations. The established plan is then applied with communications between power supply integrated circuits and load system-on-chip.

Abstract: A switch controller compensates the total on-time delay of the switch in a switching power converter. The intended on-time of the switching transistor for the present switching cycle is reduced by the time difference between the actual on-time and the intended on-time of the switching transistor in the previous switching cycle in the switching power converter. The total delay of the switch in the switching power converter, including propagation delay, switch turn-on delay, and switch turn-off delay, can be compensated in real time, cycle by cycle.

Abstract: A digital phase lock loop circuit with reduced jitter at the output is disclosed. The digital phase lock loop circuit includes a phase frequency detector that determines a phase difference between a feedback signal and a reference frequency signal to generate an error signal indicative of the phase difference. A numerically controlled oscillator generates a first oscillator output signal with a frequency proportional to the error signal and a second oscillator output signal indicative of jitter of the first oscillator output signal in reference to the reference frequency signal. A phase accuracy extender determines a delay amount from the second oscillator output signal and delays the first oscillator output signal by the delay amount to generate a phase-enhanced output signal with edges aligned with one of a plurality of reference clock signals.

Abstract: An LED lamp is provided in which the output light intensity of the LEDs in the LED lamp is adjusted based on the input voltage to the LED lamp. The LED lamp comprises one or more LEDs, and an LED driver configured to receive an input voltage and provide regulated current to said one or more LEDs, where the LED driver is configured to adjust the regulated current to said one or more LEDs according to the input voltage to adjust the output light intensity of said one or more LEDs. The LED lamp can be a direct replacement of conventional incandescent lamps in typical wiring configurations found in residential and commercial building lighting applications that use conventional dimmer switches that carry out dimming by changing the input voltage to the LED lamp.

Abstract: An LED driver includes at least two interlocked closed feedback loops. One feedback loop controls the duty cycle of the on/off times of a switch connected in series to the LED string, and the other feedback loop controls the duty cycle of the on/off times of a power switch in the switching power converter that provides a DC voltage applied to the LED string. The LED driver of the present invention achieves fast control of the LED brightness and current sharing among multiple LED strings simultaneously in a power-efficient and cost-efficient manner.