Abstract: A field-effect transistor involves a drain electrode, a drift region, a body region, a source region, a gate insulator layer, and a gate electrode. The drift region is disposed above the drain electrode. The body region extends down into the drift region from a first upper semiconductor surface. The source region is ladder-shaped and extends down in the body region from a second upper semiconductor surface. The first and second upper semiconductor surfaces are substantially planar and are not coplanar. A first portion of the body region is surrounded laterally by a second portion of the body region. The second portion of the body region and the drift region meet at a body-to-drift boundary. The body-to-drift boundary has a central portion that is non-planar. A gate insulator layer is disposed over the source region and a gate electrode is disposed over the gate insulator.

Abstract: A process for fabrication of a power semiconductor device is disclosed in which a single photomask is used to define each of p-conductivity well regions and n-conductivity type source regions. In the process a single photomask is deposited on a layer of polysilicon on a wafer, the polysilicon layer is removed from first regions of the power semiconductor device where the p-conductivity well regions and the n-conductivity type source regions are to be formed, and both p-conductivity type and n-conductivity type dopants are introduced into the wafer through the first regions.

Abstract: A flyback converter involves a bipolar transistor (BJT) and a parallel-connected diode as the rectifying element in the secondary side of the converter. The transformer of the converter has a primary winding, a first secondary winding, and a second secondary winding. A first end of the first secondary winding is coupled to the BJT base. A first end of the second secondary winding is coupled to the BJT collector and to the anode of the diode. The first and second secondary windings are wound such that when primary winding current stops, pulses of current flow out of the first ends of the first and second secondary windings. These currents are such that the BJT is maintained in saturation throughout at least most of the time current flows through the rectifying element, thereby achieving a low forward voltage across the rectifying element, reducing conduction loss, and increasing converter efficiency.

Abstract: In a steady state operation mode, a charging circuit of a non-isolated AC-to-DC converter decouples an output voltage VO node from a VR node when the rectifier output signal VR on the VR node is greater than a first predetermined voltage VP and, 2) supplies a charging current from the VR node and onto the VO node when VR is less than VP provided that an output voltage VO on the VO node is less than a second predetermined voltage VO(MAX) and provided that VR is greater than VO. In an initial power up operation mode, the maximum limit value of the charging current is smaller than it is during steady state operation. Due to the reduced charging currents employed during initial power up operation, less noise is injected back to the AC source and EMI filters are not required between the rectifier of the converter and the AC source.

Abstract: A diode is defined on a die. The diode includes a substrate of P conductivity having an upper surface and a lower surface, the substrate having first and second ends corresponding to first and second edges of the die. An anode contacts the lower surface of the substrate. A layer of N conductivity is provided on the upper surface of the substrate, the layer having an upper surface and a lower surface. A doped region of N conductivity is formed at an upper portion of the layer. A cathode contacts the doped region. A passivation layer is provided on the upper surface of the layer and proximate to the cathode.

Abstract: A recess is formed into a first side of a wafer such that a thinned center portion of the wafer is formed, and such that the central portion is surrounded by a thicker peripheral edge support portion. The second side of the wafer remains substantially entirely planar. After formation of the thinned wafer, vertical power devices are formed into the first side of the central portion of the wafer. Formation of the devices involves forming a plurality of diffusion regions into the first side of the thinned central portion. Metal electrodes are formed on the first and second sides, the peripheral portion is cut from the wafer, and the thin central portion is diced to form separate power devices. In one example, a first commercial entity manufactures the thinned wafers, and a second commercial entity obtains the thinned wafers and performs subsequent processing to form the vertical power devices.

Abstract: A DBA-based power device includes a DBA (Direct Bonded Aluminum) substrate. An amount of silver nanoparticle paste of a desired shape and size is deposited (for example by micro-jet deposition) onto a metal plate of the DBA. The paste is then sintered, thereby forming a sintered silver feature that is in electrical contact with an aluminum plate of the DBA. The DBA is bonded (for example, is ultrasonically welded) to a lead of a leadframe. Silver is deposited onto the wafer back side and the wafer is singulated into dice. In a solderless silver-to-silver die attach process, the silvered back side of a die is pressed down onto the sintered silver feature on the top side of the DBA. At an appropriate temperature and pressure, the silver of the die fuses to the sintered silver of the DBA. After wirebonding, encapsulation and lead trimming, the DBA-based power device is completed.

Abstract: An IGBT die structure includes an auxiliary P well region. A terminal, that is not connected to any other IGBT terminal, is coupled to the auxiliary P well region. To accelerate IGBT turn on, a current is injected into the terminal during the turn on time. The injected current causes charge carriers to be injected into the N drift layer of the IGBT, thereby reducing turn on time. To accelerate IGBT turn off, charge carriers are removed from the N drift layer by drawing current out of the terminal. To reduce VCE(SAT), current can also be injected into the terminal during IGBT on time. An IGBT assembly involves the IGBT die structure and an associated current injection/extraction circuit. As appropriate, the circuit injects or extracts current from the terminal depending on whether the IGBT is in a turn on time or is in a turn off time.

Abstract: A Low Forward Voltage Rectifier (LFVR) includes a bipolar transistor, a parallel diode, and a base current injection circuit disposed in an easy-to-employ two-terminal package. In one example, the transistor is a Reverse Bipolar Junction Transistor (RBJT), the diode is a distributed diode, and the base current injection circuit is a current transformer. Under forward bias conditions (when the voltage from the first package terminal to the second package terminal is positive), the LFVR conducts current at a rated current level with a low forward voltage drop (for example, approximately 0.1 volts). In reverse bias conditions, the LFVR blocks current flow. Using the LFVR in place of a conventional silicon diode rectifier in the secondary of a flyback converter reduces average power dissipation and increases power supply efficiency.

Abstract: An IGBT die structure includes an auxiliary P well region. A terminal, that is not connected to any other IGBT terminal, is coupled to the auxiliary P well region. To accelerate IGBT turn on, a current is injected into the terminal during the turn on time. The injected current causes charge carriers to be injected into the N drift layer of the IGBT, thereby reducing turn on time. To accelerate IGBT turn off, charge carriers are removed from the N drift layer by drawing current out of the terminal. To reduce VCE(SAT), current can also be injected into the terminal during IGBT on time. An IGBT assembly involves the IGBT die structure and an associated current injection/extraction circuit. As appropriate, the circuit injects or extracts current from the terminal depending on whether the IGBT is in a turn on time or is in a turn off time.

Abstract: A packaged power field effect transistor device includes a power field effect transistor die, a DBA substrate, a clip, a wire bond, leads, and an amount of plastic encapsulant. The top of the DBA has a plurality of metal plate islands. A sintered silver feature is disposed on one of the islands. A silvered backside of the die is directly bonded to the sintered silver structure of the DBA. The upper surface of the die includes a first aluminum pad (a source pad) and a second aluminum pad (a gate pad). A sintered silver structure is disposed on the first aluminum pad, but there is no sintered silver structure disposed on the second aluminum pad. A high current clip is attached via soft solder to the sintered silver structure on the first aluminum pad (the source pad). A bond wire is ultrasonically welded to the second aluminum pad (gate pad).

Abstract: A power supply circuit includes a rectifier, a charging circuit, and a storage capacitor. An AC signal is rectified by the rectifier thereby generating a rectified signal VR between a VR node and a GND node. The capacitor is coupled between an output voltage VO node and the GND node. If VR is greater than a first predetermined voltage VP then the VO node is decoupled from the VR node. If VR is below VP then the charging circuit supplies a substantially constant charging current from the VR node, through the charging circuit, to the VO node, and to the capacitor, provided that VO on the capacitor is below a second predetermined voltage VO(MAX) and provided that VR is adequately high with respect to VO. Due to the charging current, the voltage VO on the storage capacitor is restored to the desired second predetermined voltage.

Abstract: A packaged power field effect transistor device includes a power field effect transistor die, a DBA substrate, a clip, a wire bond, leads, and an amount of plastic encapsulant. The top of the DBA has a plurality of metal plate islands. A sintered silver feature is disposed on one of the islands. A silvered backside of the die is directly bonded to the sintered silver structure of the DBA. The upper surface of the die includes a first aluminum pad (a source pad) and a second aluminum pad (a gate pad). A sintered silver structure is disposed on the first aluminum pad, but there is no sintered silver structure disposed on the second aluminum pad. A high current clip is attached via soft solder to the sintered silver structure on the first aluminum pad (the source pad). A bond wire is ultrasonically welded to the second aluminum pad (gate pad).

Abstract: A Low Forward Voltage Rectifier (LFVR) includes a bipolar transistor, a parallel diode, and a base current injection circuit disposed in an easy-to-employ two-terminal package. In one example, the transistor is a Reverse Bipolar Junction Transistor (RBJT), the diode is a distributed diode, and the base current injection circuit is a current transformer. Under forward bias conditions (when the voltage from the first package terminal to the second package terminal is positive), the LFVR conducts current at a rated current level with a low forward voltage drop (for example, approximately 0.1 volts). In reverse bias conditions, the LFVR blocks current flow. Using the LFVR in place of a conventional silicon diode rectifier in the secondary of a flyback converter reduces average power dissipation and increases power supply efficiency.

Abstract: A Reverse Bipolar Junction Transistor (RBJT) integrated circuit comprises a bipolar transistor and a parallel-coupled distributed diode. The bipolar transistor involves many N-type collector regions. Each N-type collector region has a central hole so that P-type material from an underlying P-type region extends up into the hole. A collector metal electrode covers the central hole forming a diode contact at the top of the hole. When the distributed diode conducts, current flows from the collector electrode, down through the many central holes in the many collector regions, through corresponding PN junctions, and to an emitter electrode disposed on the bottom side of the IC. The RBJT and distributed diode integrated circuit has emitter-to-collector and emitter-to-base reverse breakdown voltages exceeding twenty volts. The collector metal electrode is structured to contact the collector regions, and to bridge over the base electrode, resulting in a low collector-to-emitter voltage when the RBJT is on.

Abstract: A DBA-based power device includes a DBA (Direct Bonded Aluminum) substrate. An amount of silver nanoparticle paste of a desired shape and size is deposited (for example by micro-jet deposition) onto a metal plate of the DBA. The paste is then sintered, thereby forming a sintered silver feature that is in electrical contact with an aluminum plate of the DBA. The DBA is bonded (for example, is ultrasonically welded) to a lead of a leadframe. Silver is deposited onto the wafer back side and the wafer is singulated into dice. In a solderless silver-to-silver die attach process, the silvered back side of a die is pressed down onto the sintered silver feature on the top side of the DBA. At an appropriate temperature and pressure, the silver of the die fuses to the sintered silver of the DBA. After wirebonding, encapsulation and lead trimming, the DBA-based power device is completed.

Abstract: A packaged power field effect transistor device includes a power field effect transistor die, a DBA substrate, a clip, a wire bond, leads, and an amount of plastic encapsulant. The top of the DBA has a plurality of metal plate islands. A sintered silver feature is disposed on one of the islands. A silvered backside of the die is directly bonded to the sintered silver structure of the DBA. The upper surface of the die includes a first aluminum pad (a source pad) and a second aluminum pad (a gate pad). A sintered silver structure is disposed on the first aluminum pad, but there is no sintered silver structure disposed on the second aluminum pad. A high current clip is attached via soft solder to the sintered silver structure on the first aluminum pad (the source pad). A bond wire is ultrasonically welded to the second aluminum pad (gate pad).

Abstract: A sheet of material includes a layer of the insulative thermoplastic material such as PET (poly(ethylene terephthalate)). The sheet is placed down over the wirebonds and a semiconductor die of a substrate assembly so that the sheet contacts the wirebonds and/or the semiconductor die. In one example, the sheet is a preform and the bottom of the sheet includes a layer of tacky adhesive that adheres the sheet to the substrate assembly. The sheet is then heated such that the PET softens and becomes conformal to the wirebonds and the semiconductor die of the upper surface of the substrate assembly. The resulting encapsulated substrate assembly is then encapsulated (for example, by overmolding in an injection molding process) to form a packaged semiconductor device. The conformal PET sheet is embedded within the packaged semiconductor device in such a way that it separates the wirebonds and semiconductor die from another encapsulant.

Abstract: A Low Forward Voltage Rectifier (LFVR) circuit includes a bipolar transistor, a parallel diode, and a capacitive current splitting network. The LFVR circuit, when it is performing a rectifying function, conducts the forward current from a first node to a second node provided that the voltage from the first node to the second node is adequately positive. The capacitive current splitting network causes a portion of the forward current to be a base current of the bipolar transistor, thereby biasing the transistor so that the forward current experiences a low forward voltage drop across the transistor. The LFVR circuit sees use in as a rectifier in many different types of switching power converters, including in flyback, Cuk, SEPIC, boost, buck-boost, PFC, half-bridge resonant, and full-bridge resonant converters. Due to the low forward voltage drop across the LFVR, converter efficiency is improved.

Abstract: A packaged power semiconductor device is provided with voltage isolation between a metal backside and terminals of the device. The packaged power semiconductor device is arranged in an encapsulant defining a hole for receiving a structure for physically coupling the device to an object. A direct-bonded copper (“DBC”) substrate is used to provide electrical isolation and improved thermal transfer from the device to a heatsink. At least one power semiconductor die is mounted to a first metal layer of the DBC substrate. The first metal layer spreads heat generated by the semiconductor die. In one embodiment, the packaged power semiconductor device conforms to a TO-247 outline and is capable of receiving a screw for physically coupling the device to a heatsink.