Patents Assigned to Japan Electronic Materials Corporation
  • Publication number: 20240110974
    Abstract: The purpose of the present invention is to provide a method for repairing a probe card in which a defect has occurred in an alignment symbol or a peripheral region thereof by using a high reflection chip for alignment. The present invention is provided with a probe 16 for contacting an inspection object, a wiring substrate 14 to which the probe 16 is attached, and a high reflection chip 4 for alignment provided to a probe installation surface 17 of the wiring substrate 14. The high reflection chip 4 includes a metal plate having a fixing through-hole 41, and has an affixing surface to be attached to the probe installation surface 17 with an adhesive 6 and a mirror-finished high reflection surface on the other side from the affixing surface. The adhesive 6 formed on the affixing surface has a ridge 61 that extends into the fixing through-hole 41.
    Type: Application
    Filed: April 23, 2021
    Publication date: April 4, 2024
    Applicant: Japan Electronic Materials Corporation
    Inventor: Yutaka TOMITA
  • Publication number: 20240103071
    Abstract: An object is to provide an alignment chip for forming an alignment symbol on a wiring board of a probe card. Provided are: a substrate 51 having a pasting surface to be pasted to a probe installation surface 17 of a wiring board 14 constituting a probe card 10 via an adhesive 54; and an alignment symbol 501 made of a metal film 52 formed on a symbol surface on a side opposite to the pasting surface of the substrate 51. The symbol surface includes a symbol peripheral region 502 surrounding the alignment symbol 501, and the symbol peripheral region 502 has a lower reflectance than the alignment symbol 501.
    Type: Application
    Filed: February 19, 2021
    Publication date: March 28, 2024
    Applicant: Japan Electronic Materials Corporation
    Inventor: Takashi YOSHIDA
  • Publication number: 20240044942
    Abstract: An object is to provide a probe card for high-temperature inspection at low cost. A wiring board 130 that supports a large number of probes 15, a heat-generating film 3 formed on the wiring board 130, and a pair of electrode terminals 4 that supplies a current to the heat-generating film 3 are provided, and the heat-generating film 3 is formed on a surface of the wiring board 130 by applying a heat-generating coating material in which fine carbon particles are dispersed in a binder.
    Type: Application
    Filed: March 15, 2021
    Publication date: February 8, 2024
    Applicant: Japan Electronic Materials Corporation
    Inventors: Yuuki NAKAMURA, Masatoshi HASAKA, Hiroshi YAMANAKA
  • Publication number: 20230408547
    Abstract: An object of the present invention is to provide a multilayer wiring substrate for probe card capable of preventing deterioration of a thin film resistor 30.
    Type: Application
    Filed: November 17, 2020
    Publication date: December 21, 2023
    Applicant: Japan Electronic Materials Corporation
    Inventors: Satoshi ABE, Tetsuo FUJIMOTO, Yusuke HARADA, Shinya HORI
  • Publication number: 20230266365
    Abstract: An object is to provide a probe card that enables probes to be arranged at a narrow pitch while causing the probes being inserted through guide holes of a guide plate to be locked to the guide plate so as not to fall out. Two or more probes 200 and a first guide plate 14 including two or more first guide holes 14h through which the probes 200 are inserted, respectively, are provided. The probe 200 is arranged so as to be inclined with respect to the first guide plate 14, and has a locking portion 21 formed by causing a side surface 210 on a first direction dl side, which is a side surface above the first guide plate 14 and has an acute angle with respect to the first guide plate 14, to protrude, and an offset portion 22 formed by offsetting a side surface 220 on a second direction d2 side, which is a side surface above the first guide plate 14 and has an obtuse angle with respect to the first guide plate 14, to the locking portion side 21.
    Type: Application
    Filed: September 15, 2020
    Publication date: August 24, 2023
    Applicant: Japan Electronic Materials Corporation
    Inventor: Chikaomi MORI
  • Publication number: 20230258689
    Abstract: When a probe is made thin so as to correspond to the electrode pitch of a semiconductor device, the mechanical strength becomes insufficient. Efforts are required to devise a thin metal plate with sufficient mechanical strength. On the surface of a probe of probe card use, there are provided with a plurality of deformation regions of hollow shape or protrusion shape and a framework region provided on the boundary between adjacent deformation regions. The stress at the deformation regions is made to be distributed.
    Type: Application
    Filed: March 4, 2022
    Publication date: August 17, 2023
    Applicant: JAPAN ELECTRONIC MATERIALS CORPORATION
    Inventor: Kazumasa OKUBO
  • Patent number: 10386387
    Abstract: A probe guide plate includes a first silicon substrate having first through-holes formed therein, an insulation layer formed on the first silicon substrate and having an opening on a region in which the first through-holes are arranged, a second silicon substrate arranged on the insulation layer and having second through-holes formed at positions corresponding to the first through-holes, and a silicon oxide layer formed on exposed surfaces of the first silicon substrate and the second silicon substrate.
    Type: Grant
    Filed: January 12, 2017
    Date of Patent: August 20, 2019
    Assignees: SHINKO ELECTRIC INDUSTRIES CO., LTD., JAPAN ELECTRONIC MATERIALS CORPORATION
    Inventors: Kosuke Fujihara, Yuichiro Shimizu
  • Patent number: 10309988
    Abstract: A probe guide plate includes a first silicon substrate, a first recess portion formed in an upper surface of the first silicon substrate, first through-holes formed in the first silicon substrate at a bottom of the first recess portion, a second silicon substrate directly bonded on the first silicon substrate, a second recess portion formed to face the first recess portion in a lower surface of the second silicon substrate, and second through-holes formed in the second silicon substrate at a bottom of the second recess portion and arranged to correspond to the first through-holes, A notch portion is formed at an upper end portion of an inner wall of each of the first through-holes of the first silicon substrate.
    Type: Grant
    Filed: January 17, 2017
    Date of Patent: June 4, 2019
    Assignees: SHINKO ELECTRIC INDUSTRIES CO., LTD., JAPAN ELECTRONIC MATERIALS CORPORATION
    Inventors: Yuichiro Shimizu, Kosuke Fujihara, Katsunori Yamagishi, Koji Nagai
  • Patent number: 10261110
    Abstract: A probe guide plate includes: a silicon substrate including one surface and the other surface opposite to the one surface; a through hole formed through the silicon substrate to extend from the one surface of the silicon substrate to the other surface of the silicon substrate; a silicon oxide layer formed on the one surface of the silicon substrate, the other surface of the silicon substrate, and an inner wall surface of the through hole; and a protective insulating layer formed on the silicon oxide layer. The protective insulating layer is formed on at least one of the one surface and the other surface of the silicon substrate via the silicon oxide layer, and partially formed on the inner wall surface of the through hole via the silicon oxide layer.
    Type: Grant
    Filed: November 21, 2016
    Date of Patent: April 16, 2019
    Assignees: SHINKO ELECTRIC INDUSTRIES CO., LTD., JAPAN ELECTRONIC MATERIALS CORPORATION
    Inventors: Yuichiro Shimizu, Kosuke Fujihara, Tomoo Yamasaki, Chikaomi Mori
  • Patent number: 10139430
    Abstract: OBJECT To improve the strength of a probe guide and improve the abrasion resistance of the probe guide. MEANS FOR SETTLEMENT A guide plate 20 is formed of a silicon plate 22 having guide holes 23 respectively adapted to support contact probes 13, the inner walls of the guide holes 23 include a guide film 25 formed on the inner wall surfaces of corresponding penetration-processed holes 24 of the silicon plate 22, the cross-sectional areas of the penetration-processed holes 24 gradually increase toward a first surface of the silicon plate 22, and the film thickness of the guide film 25 gradually increases toward the first surface of the silicon plate 22. By employing such a configuration, as compared with the tilts of the inner wall surfaces of the penetration-processed holes 24, the tilts of the inner wall surfaces of the guide holes 23 can be suppressed, and the strength of the silicon plate 20 can be improved. Accordingly, the abrasion resistance of a probe guide 100 can be improved.
    Type: Grant
    Filed: January 31, 2017
    Date of Patent: November 27, 2018
    Assignees: SHINKO ELECTRIC INDUSTRIES CO., LTD., JAPAN ELECTRONIC MATERIALS CORPORATION
    Inventors: Chikaomi Mori, Yuichiro Shimizu, Kosuke Fujihara
  • Patent number: 9972933
    Abstract: The present invention intends to suppress a contact probe from interfering with a guide plate to produce shavings.
    Type: Grant
    Filed: August 11, 2017
    Date of Patent: May 15, 2018
    Assignee: Japan Electronic Materials Corporation
    Inventors: Teppei Kimura, Noriyuki Fukushima, Atsuo Urata, Naoki Arita, Tomoyuki Takeda
  • Patent number: 9841438
    Abstract: It is an object of the invention to provide a guide plate for a probe card with fine through holes at tight pitches and with increased strength. The guide plate 100 for a probe card includes a metal base 110; first insulation layers 120; and metal layers 130. The metal base 110 has a plurality of through holes 111 to receive probes therethrough, and inner walls of the through holes 111. The first insulation layers 120 are of tuboid shape and provided on the respective inner walls of the through holes 111 of the metal base 110. The metal layers 130 are provided on the first insulation layers 120.
    Type: Grant
    Filed: November 22, 2016
    Date of Patent: December 12, 2017
    Assignee: Japan Electronic Materials Corporation
    Inventors: Teppei Kimura, Liwen Fan
  • Publication number: 20170346211
    Abstract: The present invention intends to suppress a contact probe from interfering with a guide plate to produce shavings.
    Type: Application
    Filed: August 11, 2017
    Publication date: November 30, 2017
    Applicant: Japan Electronic Materials Corporation
    Inventors: Teppei Kimura, Noriyuki Fukushima, Atsuo Urata, Naoki Arita, Tomoyuki Takeda
  • Patent number: 9774121
    Abstract: The present invention intends to suppress a contact probe from interfering with a guide plate to produce shavings.
    Type: Grant
    Filed: November 27, 2013
    Date of Patent: September 26, 2017
    Assignee: Japan Electronics Material Corporation
    Inventors: Teppei Kimura, Noriyuki Fukushima, Atsuo Urata, Naoki Arita, Tomoyuki Takeda
  • Publication number: 20170242057
    Abstract: OBJECT To improve the strength of a probe guide and improve the abrasion resistance of the probe guide. MEANS FOR SETTLEMENT A guide plate 20 is formed of a silicon plate 22 having guide holes 23 respectively adapted to support contact probes 13, the inner walls of the guide holes 23 include a guide film 25 formed on the inner wall surfaces of corresponding penetration-processed holes 24 of the silicon plate 22, the cross-sectional areas of the penetration-processed holes 24 gradually increase toward a first surface of the silicon plate 22, and the film thickness of the guide film 25 gradually increases toward the first surface of the silicon plate 22. By employing such a configuration, as compared with the tilts of the inner wall surfaces of the penetration-processed holes 24, the tilts of the inner wall surfaces of the guide holes 23 can be suppressed, and the strength of the silicon plate 20 can be improved. Accordingly, the abrasion resistance of a probe guide 100 can be improved.
    Type: Application
    Filed: January 31, 2017
    Publication date: August 24, 2017
    Applicants: Japan Electronic Materials Corporation, Shinko Electric Industries Co., Ltd.
    Inventors: Chikaomi Mori, Yuichiro Shimizu, Kosuke Fujihara
  • Patent number: 9535096
    Abstract: It is an object of the invention to provide a guide plate for a probe card with fine through holes at tight pitches and with increased strength. The guide plate 100 for a probe card includes a metal base 110; first insulation layers 120; and metal layers 130. The metal base 110 has a plurality of through holes 111 to receive probes therethrough, and inner walls of the through holes 111. The first insulation layers 120 are of tuboid shape and provided on the respective inner walls of the through holes 111 of the metal base 110. The metal layers 130 are provided on the first insulation layers 120.
    Type: Grant
    Filed: July 25, 2013
    Date of Patent: January 3, 2017
    Assignee: Japan Electronic Materials Corporation
    Inventors: Teppei Kimura, Liwen Fan
  • Patent number: 9523716
    Abstract: There is provided a probe guide plate. The probe guide plate includes: a substrate having a through hole for guiding a probe, which is formed through the substrate, wherein the substrate includes a first main surface and a second main surface opposite to the first main surface; and a first insulating film formed on an inner wall of the through hole and on the first and second main surfaces of the substrate such that portions of the first and second main surfaces of the substrate are exposed.
    Type: Grant
    Filed: March 10, 2014
    Date of Patent: December 20, 2016
    Assignees: SHINKO ELECTRIC INDUSTRIES CO., LTD., JAPAN ELECTRONIC MATERIALS CORPORATION
    Inventors: Akinori Shiraishi, Kosuke Fujihara
  • Patent number: 9459287
    Abstract: The invention provides a guide plate for a probe card including a silicon substrate including a surface and a through-hole, an edge part of the through-hole, and a curved-face part. The through-hole is configured to guide a probe and includes an inner wall face. The edge part of the through-hole is constituted by the surface of the silicon substrate and the inner wall face of the through-hole. The curved-face part is formed on the edge part and formed of a silicon dioxide film.
    Type: Grant
    Filed: March 12, 2014
    Date of Patent: October 4, 2016
    Assignees: JAPAN ELECTRONIC MATERIALS CORPORATION, SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Teppei Kimura, Akinori Shiraishi, Kosuke Fujihara
  • Publication number: 20140266275
    Abstract: The invention provides a guide plate for a probe card including a silicon substrate including a surface and a through-hole, an edge part of the through-hole, and a curved-face part. The through-hole is configured to guide a probe and includes an inner wall face. The edge part of the through-hole is constituted by the surface of the silicon substrate and the inner wall face of the through-hole. The curved-face part is formed on the edge part and formed of a silicon dioxide film.
    Type: Application
    Filed: March 12, 2014
    Publication date: September 18, 2014
    Applicants: Shinko Electric Industries Co., LTD., Japan Electronic Materials Corporation
    Inventors: Teppei KIMURA, Akinori SHIRAISHI, Kosuke FUJIHARA
  • Publication number: 20130265073
    Abstract: The present invention provides a ST board 2 that is formed with an lower surface electrode 22; a unit attachment plate 3 that is fastened on the ST board 2 and formed with an opening part 31 exposing the lower surface electrode 22; a probe unit 5 that includes a probe substrate 50 formed with a contact probe 51 and a probe electrode 52 and is fastened on the unit attachment plate 3; and an electrically conductive wire 54 that connects the lower surface electrode 22 and the probe electrode 52 to each other through the opening part 31. The probe unit 5 can be fastened on the ST board 2 with the unit attachment plate 3 intervening, and through the opening part 31 of the unit attachment plate 3, the probe electrode 51 and the lower surface electrode 22 can be electrically connected to each other.
    Type: Application
    Filed: January 16, 2011
    Publication date: October 10, 2013
    Applicant: Japan Electronic Materials Corporation
    Inventors: Hirofumi Nakano, Taishi Uemura, Kazuhiro Matsuda