Abstract: A non-volatile semiconductor memory device, which is intended to prevent data destruction by movements of electric charges between floating gates and thereby improve the reliability, includes element isolation/insulation films buried into a silicon substrate to isolate stripe-shaped element-forming regions. Formed on the substrate area floating gate via a first gate insulating film and further a control gate via a second gate insulating film. Source and drain diffusion layers are formed in self-alignment with control gates. The second gate insulating film on the floating gate is divided and separated together with the floating gate by slits above the element isolation/insulation films into discrete portions of individual memory cells.

Abstract: A first power source 11 for supplying a bias voltage to a gate electrode G of a field effect transistor 13, which amplifies high-frequency signals, and a second power source 15 for supplying a bias voltage to a drain electrode D of the field effect transistor 13 are provided. The protective resistance 12 is connected between the gate electrode G of the field effect transistor 13 and the first power source 11, and the bias voltage controller 14 is connected between the drain electrode D of the field effect transistor 13 and the second power source 11. Further, a voltage detector 16 is connected between both ends of the protective resistance 12 to detect a voltage drop generated between both ends of the protective resistance 12, when a rectified current flows to the gate electrode G from the drain electrode D of the field effect transistor 13.

Abstract: An image processing apparatus can generate reduced images such as a preview image and a thumbnail image, which are used for performing check of an image and selection of an image, with a small-sized circuit. The generation of the reduced image is performed substantially simultaneously with image reading.

Abstract: An ultrasonic probe including a piezoelectric vibrator configured to transmit and receive ultrasonic waves, an acoustic lens configured to focus the ultrasonic waves and an acoustic matching layer arranged between the piezoelectric vibrator and the acoustic lens and configured to modify acoustic impedance from the piezoelectric vibrator to the acoustic lens. The acoustic matching layer includes a first region arranged at center areas along a direction of transmitting and receiving of the ultrasonic waves, a second region arranged between the first region and the piezoelectric vibrator and having a rate of change of acoustic impedance which is less than rate of change of acoustic impedance of the first region and a third region arranged between the first region and the acoustic lens, and having a rate of change of acoustic impedance which is less than a rate of change of acoustic impedance of the first region.

Abstract: A magnetoresistive element has a ferromagnetic double tunnel junction having a stacked structure of a first antiferromagnetic layer/a first ferromagnetic layer/a first dielectric layer/a second ferromagnetic layer/a second dielectric layer/a third ferromagnetic layer/a second antiferromagnetic layer. The second ferromagnetic layer that is a free layer consists of a Co-based alloy or a three-layered film of a Co-based alloy/a Ni—Fe alloy/a Co-based alloy. A tunnel current is flowed between the first ferromagnetic layer and the third ferromagnetic layer.

Abstract: The present invention relates to ultra wide band (UWB) applications such as radar, position tracking and communications for example Ground Penetrating Radar (GPR) and Wireless Personal Area Networking (WPANs). The present invention provides an apparatus for synchronising a receiver to a received UWB signal having a known hopping code, the apparatus comprising: means for determining a parameter of the signal in a number of time slots; means for adding the parameter associated with each time slot to a number of corresponding of time and code offset accumulators; means for determining the code and time offset accumulator having an accumulated value according to a predetermined accumulator metric as the code and time offset required to synchronise the receiver.

Abstract: A magnetoresistive element has a ferromagnetic double tunnel junction having a stacked structure of a first antiferromagnetic layer/a first ferromagnetic layer/a first dielectric layer/a second ferromagnetic layer/a second dielectric layer/a third ferromagnetic layer/a second antiferromagnetic layer. The second ferromagnetic layer that is a free layer consists of a Co-based alloy or a three-layered film of a Co-based alloy/a Ni—Fe alloy/a Co-based alloy. A tunnel current is flowed between the first ferromagnetic layer and the third ferromagnetic layer.

Abstract: A scheme for realizing a contents protection procedure between devices that are not connected to the same network, in a system where the IEEE 1394 buses are connected together through a 1394 bridge or a system where the IEEE 1394 buses are connected together through another radio network, is disclosed. A network connection device notifies information regarding a transmission node on the first IEEE 1394 bus to a reception node on the second IEEE 1394 bus, so that the reception node can carry out the authentication and key exchange procedure directly with the transmission node on a different network.

Abstract: An isolation region is embedded in a semiconductor substrate. The height of the upper face of the isolation region is substantially equal to the height of the surface of the semiconductor substrate. A gate electrode is formed on a gate insulating film and over the isolation region. A first side face of the gate electrode is formed over the isolation region. A second side face of the gate electrode is formed over the active region. A field insulator is formed on the isolation region. A first side face of the field insulator contacts with the first side face of the gate electrode. A second side face of the field insulator is continuous with a plane obtained by extending the side face of the isolation region. A sidewall insulator has a sidewall contacting with the second side face of the field insulator and the second side face of the gate electrode.

Abstract: A data management system capable of realizing improved flexibility, independency and expandability together is disclosed. The data management system is formed by a memory unit configured to store a plurality of data operation modules for operating data which have different operation functions, and an operation unit configured to read out data requested by the application program from the data storage system, select those data operation modules that should carry out the operations with respect to the data such that the data will be in compliance with a data model suitable for the processing that the application program wishes to carry out, from the plurality of data operation modules, such that the data to which the operations are applied by selected data operation modules are given to the application program.

Abstract: A scheme for realizing communications through an external network such as telephone network from a contents processing device such as AV device or PC connected to a local network such as home network is disclosed. The contents processing device solicits a set up of connection to the server device through the telephone network, to a gateway device which is connected with both the home network and the telephone network. Then, the gateway device carries out a call set up with respect to a specified address on the telephone network, upon receiving the solicitation from the contents processing device, and transfers data transmitted from the contents processing device to a connection established by the call set up, and data arriving from the connection established by the call set up to the contents processing device.

Abstract: The present invention provides a semiconductor device having an improved silicon oxide film as a gate insulation film of a Metal Insulator Semiconductor structure and a method of making the same.

Abstract: A packet transfer scheme in a network system capable of realizing a high speed, large capacity inter-network communication under an internet environment. A network interconnection apparatus (router) has a memory for storing a correspondence relationship between a virtual connection used in receiving a packet from one logical network and a virtual connection used in transmitting a packet to another logical network, and a transfer at a datalink layer is carried out according to the registered correspondence relationship, to effectively form a bypass pipe capable of transferring a packet by an datalink layer level processing alone over a plurality of networks from the transmission terminal to the destination terminal, so that a high speed packet transfer between networks can be realized.

Abstract: Disclosed is a copper-based metal polishing solution which hardly dissolves a Cu film or a Cu alloy film when the film is dipped into the solution, and has a dissolution velocity during polishing several times higher than that during dipping. This copper-based metal polishing solution contains at least one acid selected from aminoacetic acid and aminosulfuric acid, an oxidizer, and water.

Abstract: There is proposed a non-aqueous electrolyte secondary battery having an electrode assembly which is impregnated with a non-aqueous electrolyte solution, wherein the battery can be made thin while maintaining improved capacity, large-current characteristics and cycle life.

Abstract: Image forming apparatus which form an image on a substrate and uses a liquid developer containing toner particles and a solvent. One embodiment includes a latent image retaining body, a first developing surface facing the latent image retaining body at a first development station, a latent image forming unit, and a second developing surface facing the latent image retaining body at a second development station. The latent image retaining body has a photosensitive layer which has a dielectric constant &egr;p [C2/Nm2] and an average thickness dp [m]. The photosensitive layer retains an image developed by the first developing surface and a latent image comprising image and non-image regions formed by the latent image forming unit. The second developing surface is supplied with a developing electrical potential having an electrical potential difference &Dgr;V from an electrical potential of non-image region of the latent image.

Abstract: A portable information processing terminal device, realizing both a low power consumption and a large memory capacity, is formed by a first memory for storing files, a second memory for storing a plurality of files, the second memory having a larger memory capacity and a higher power consumption than the first memory, a processing unit configured to read and process files stored in the first memory, and to access the second memory when a desired file does not exist in the first memory, a judgement unit configured to judge whether there is a possibility of external power supply or not, a prohibition unit configured to prohibit activation of the second memory when the judging unit judges that there is no possibility of external power supply, and a control unit configured to select prescribed files that are expected to have probabilities for being accessed during a period in which activation of the second memory is prohibited by the prohibition unit, and to store the prescribed files into the first memory in adv

Abstract: A parallel computer of this invention includes a plurality of memory elements and a plurality of processing elements and each of the processing elements is connected to logically adjacent memory elements. For example, the processing elements which corresponds to a logical position (i, j) is connected to the memory elements which correspond to a plurality of logical positions (i, j), (i, j+1), (i+1, j) and (i+1, j+1). It is preferable if each of the memory elements can be accessed from the exterior. According to this invention, efficient memory access can be made and the parallel processing can be performed at high speed without increasing the hardware amount and making the control operation complicated. Further, the operation speed of the image processing can be enhanced by constructing an image memory by use of a plurality of memory elements and causing the processing element to effect the image processing in a distributed and cooperative manner.

Abstract: A semiconductor device including a silicon substrate, a gate insulator film formed on the silicon substrate and including silicon, deuterium, and at least one of oxygen and nitrogen, and a gate electrode formed on the gate insulator film wherein a deuterium concentration in a vicinity of an interface of the gate insulator film with the gate electrode is at least 1×107 cm−3, and a deuterium concentration in a vicinity of an interface of the gate insulator film with the silicon substrate is higher than the deuterium concentration in the vicinity of the interface of the gate insulation film with the gate electrode.

Abstract: A computer readable medium encoded with a hardware description language describing a virtual component for an integrated circuit design, the virtual component comprising a virtual component body having at least one circuit function and a verification-supporting circuit detachably connected to the virtual component body. The verification-supporting circuit may include a verification-output terminal described by the hardware description language. The verification-output terminal is configured to output a signal indicating an operation state inside of the virtual component body, and is detachably connected to the virtual component body so as not to affect the operation of the virtual component body even when the connection of the verification-output terminal with the virtual component body is cut.