Patents Assigned to Kabushiki Kaisha Eastern
  • Patent number: 9922923
    Abstract: To provide a technique capable of easily forming a resin opening of a desired shape. As a solution, a base is prepared which has a first surface region and a second surface region around the first surface region, and which has a wiring formed thereon. Subsequently, a resist which covers the first surface region is formed. Then, the first surface region and the second surface region are covered with a resin body such that the resist is included therein, and the resist is exposed from the resin body. After that, the exposed resist is removed, so that a resin opening that exposes the base in the first surface region is formed in the resin body.
    Type: Grant
    Filed: May 15, 2015
    Date of Patent: March 20, 2018
    Assignee: KABUSHIKI KAISHA EASTERN
    Inventor: Yoshiaki Narisawa
  • Publication number: 20170148717
    Abstract: To provide a technique capable of easily forming a resin opening of a desired shape. As a solution, a base is prepared which has a first surface region and a second surface region around the first surface region, and which has a wiring formed thereon. Subsequently, a resist which covers the first surface region is formed. Then, the first surface region and the second surface region are covered with a resin body such that the resist is included therein, and the resist is exposed from the resin body. After that, the exposed resist is removed, so that a resin opening that exposes the base in the first surface region is formed in the resin body.
    Type: Application
    Filed: May 15, 2015
    Publication date: May 25, 2017
    Applicant: KABUSHIKI KAISHA EASTERN
    Inventor: Yoshiaki NARISAWA
  • Patent number: 6426468
    Abstract: The circuit board of the present invention makes the length of the conductor patterns shorter and improves the electric performance for the high speed signal processing. The circuit board of the present invention, which comprises a substrate, is characterized in that the substrate includes: a first face on which conductor patterns, which will be connected to a semiconductor chip, are formed; a second face on which a plurality of pads, on which terminals are formed, are matrically formed; and plated through holes whose one end are respectively opened in the conductor patterns and whose the other ends are respectively opened in the pads, wherein inner faces of the plated through holes are coated with plating layers so as to respectively electrically connect the conductor patterns with the pad.
    Type: Grant
    Filed: September 19, 2000
    Date of Patent: July 30, 2002
    Assignee: Kabushiki Kaisha Eastern
    Inventors: Hisanobu Utsunomiya, Tadahisa Tanaka
  • Patent number: 6239381
    Abstract: In the circuit board of the present invention, a base board has a first face and a second face, in which a plurality of sets of wire patterns, to which semiconductor chips are respectively connected, are printed on the first face. A metal plate for radiating heat is fixed on the second face of the base board. The base board includes a V-notch being formed along a border between the sets of wire patterns, and the metal plate includes a V-notch being formed to correspond to the V-notch of the base board, whereby the circuit board is divided into a plurality of circuit units, which are mutually connected by a thin section corresponding to the V-notches of the metal plate.
    Type: Grant
    Filed: June 10, 1998
    Date of Patent: May 29, 2001
    Assignee: Kabushiki Kaisha Eastern
    Inventors: Yoshiji Kasai, Kaoru Hära, Misao Aruga
  • Patent number: 5824964
    Abstract: In the circuit board of the present invention, a base board has a first face and a second face, in which a plurality of sets of wire patterns, to which semiconductor chips are respectively connected, are printed on the first face. A metal plate for radiating heat is fixed on the second face of the base board. The base board includes a V-notch being formed along a border between the sets of wire patterns, and the metal plate includes a V-notch being formed to correspond to the V-notch of the base board, whereby the circuit board is divided into a plurality of circuit units, which are mutually connected by a thin section corresponding to the V-notches of the metal plate.
    Type: Grant
    Filed: April 11, 1997
    Date of Patent: October 20, 1998
    Assignee: Kabushiki Kaisha Eastern
    Inventors: Yoshiji Kasai, Kaoru Hara, Misao Aruga