Abstract: According to one embodiment, a hard disk drive includes a detecting circuit configured to detect abnormality of a supply voltage. The hard disk drive also includes a refresh controller configured to, when the abnormality of the supply voltage is detected during a data refresh process in sector units to a magnetic disk, finish the data refresh process to a sector after writing of data to a data area is finished, the data area to which the writing is performed when the abnormality of the supply voltage is detected, without stepping over a servo area.

Abstract: A semiconductor device includes a semiconductor substrate, and a circuit pattern group comprising at least N (?2) circuit pattern on the semiconductor substrate, at least one vicinity of end portion among the at least of N circuit patterns including a connection area to electrically connect to a circuit pattern in another circuit pattern group different from the circuit pattern group, the at least N wirings pattern including a circuit pattern N1 and at least one circuit pattern Ni (i?2) arranged in one direction different from longitudinal direction of the circuit pattern N1, the at least one circuit patterns Ni having larger i being arranged at further position away from the circuit pattern N1, and in terms of a pattern including the connection area among the at least of Ni circuit patterns, the larger the i, the connection area being arranged at a further position in longitudinal direction.

Abstract: The semiconductor device having a multilayer gate type transistor constituting memory, comprises a P-type semiconductor substrate, a source formed by diffusing an N-type impurity on a surface of the semiconductor substrate to a first depth, an N-type drain, electrically separated from the source and formed on a surface of the semiconductor substrate, a first insulating film formed on a surface of a channel region between the source and the drain, a first gate electrode formed on a surface of the first insulating film, a second insulating film formed on a surface of the first gate electrode, and a second gate electrode on the second insulating film. The semiconductor device further comprises a source wiring region, which is connected to the source of the multilayer gate transistor and formed by diffusing the N-type impurity in the semiconductor substrate to a second depth shallower than the first depth.