Patents Assigned to Kabushiki Kaisha Toshipa
  • Patent number: 6154394
    Abstract: The input-output terminal of a semiconductor memory is provided with a data input-output circuit for making it possible to improve the speed of the data input-output by synchronizing the data outputting operation and the Hi-Z control of an output buffer. The data input-output circuit comprises a temporary data storage circuit for temporarily storing data as input and outputting the data as input, an output buffer connected between the temporary data storage circuit and the input-output terminal of the semiconductor data storage device, and an output control circuit for outputting data to the temporary data storage circuit in order to control an output of the output buffer to a high impedance state when the output buffer and the input-output terminal are separated. A differential amplifier connected to the temporary data storage circuit may be provided in place of the output control circuit for performing the Hi-Z control by precharging or discharging.
    Type: Grant
    Filed: April 26, 1999
    Date of Patent: November 28, 2000
    Assignee: Kabushiki Kaisha Toshipa
    Inventor: Osamu Hirabayashi