Abstract: An FM signal transmitter has a processing module, a connecting module and an FM transmitting module. The connecting module is electronically connected to the processing module and has a Universal Serial Bus (USB) unit that is selectively connected to a computer and receives audio data from the computer, wherein the USB unit has a memory storing a preset USB class. The FM transmitting module is electronically connected to and controlled by the processing module to broadcast an FM signal corresponding to the audio data under a specific frequency. The computer may perform an audio filtering method to successively rewrite the preset USB class from USB-HID, USB-AUDIO and USB-HID so that the computer can transmit audio data excluding system generated sounds to the FM signal transmitter.

Abstract: An integrated data processor of the present invention integrates a plurality of functions of a digital signal processor (DSP) and a microprocessor control unit (MCU). A plurality of novel instructions and pipeline parallelism architecture are applied. A pipeline parallelism intends to have read/write actions executed in different stages, so as to complete executing an instruction in a single cycle. An operand can be fetched from a RAM, and a calculation result can be written back to the RAM, so as to enhance operation efficiency of the processor.

Abstract: A latch-up-free ESD protection circuit using SCR is disclosed, in which an SCR is connected between the input pad and the negative power supply; a turn-on switch and a turn-off switch are connected between the positive power supply VDD (or the input pad) and the SCR; and a transistor gating circuit is connected to the turn-on switch and the turn-off switch to direct the operation of the SCR. When overvoltage stress develops over the input pad in the fast-transient mode, the turn-on switch enables the NPN transistor to switch on the SCR to form a discharging path for electrostatic discharge; and when overvoltage stress is released, the turn-off switch enables the PNP transistor to switch off the SCR, thus making it immune to any latch-up after the overvoltage stress is released, and having the advantages of fast triggering, low trigger voltage, no latch-up, and full ESD protection in the active and passive modes.

Abstract: An amplifier circuit with a shared current source a first amplifier, a second amplifier and a current source. The output of the first amplifier (10) is coupled to the current source (30). When the second amplifier (20) is cascaded onto the first amplifier (10), the current source (30) is also connected to the second amplifier (20), such that these two amplifiers can share a common drive current, so the power dissipated by these two amplifiers is greatly reduced. This technique is implemented with Class A amplifiers, Class B amplifiers, Class AB amplifiers or a combination of the above amplifiers in cascade.

Abstract: A temperature compensated technique and circuit can be realized through the generation of a temperature compensated output voltage (Vnew) provided after summing the temperature coefficients (TC1,TC2) of two base voltages (VTC1, VTC2) assigned with different weights (a, b) and producing a new temperature coefficient (TCnew). This TCnew satisfies the expression: TCnew=TC1+a×(TC2?TC1), where the assigned weighted value (a) can be either a positive or a negative value, depending on the requirement of a circuit, in order to develop voltage supply suitable for wider applications.

Abstract: An optical signal detection apparatus and method for a computer mouse compares two output signals of a first photo-transistor and a second photo-transistor to obtain a reference signal. Then a pulse signal generating unit utilizes the reference signal to generate a series of pulse signals each occurring when the voltage level of the reference signal is changed. Thereafter a sample and hold circuit samples and holds the voltage value of the output signals of the photo-transistors at the moments that pulse signals are generated. A dynamic reference voltage generating unit uses the sampled voltage values to calculate a dynamic reference voltage. The voltage level of the dynamic reference voltage is varied with the output signals of the photo-transistors. By using the dynamic reference voltage to compare with the output signals of the photo-transistors, the on/off statuses of the photo-transistors can be precisely detected.

Abstract: A low voltage generating circuit has a first current mirror to provide a first stable current, a second current mirror coupled to the first current mirror and a voltage generating unit connected to the second current mirror. The second current mirror provides a second current that is proportional to the first current in the voltage generating unit. The voltage generating unit utilizes three resistors in a T-shaped configuration, wherein a voltage output is taken from the T-shaped configuration and can output a voltage value less than one volt.

Abstract: A method of forming multi-state mask ROM cells on a semiconductor substrate is disclosed. The method comprises following steps. Firstly, a pad oxide layer is formed on a semiconductor substrate. Then the pad oxide layer is patterned so as to form a plurality of first coding oxide regions. Thereafter, another photoresist pattern is formed to define buried bit line regions. A plurality of predetermined buried bit line regions are defined amid the first coding oxide regions. Then, a first ion implant by implanting n-type impurities into the semiconductor substrate using the photoresist pattern as a mask. After stripping the photoresist pattern, a first thermal oxidation is performed to grow oxide layer and driving the n-type impurities into the semiconductor substrate, Three types of oxide layer are formed with different thickness. Thereafter, a conductive layer are formed and then patterned as word lines. Subsequently, a photoresist pattern is formed to define second coding region.