Patents Assigned to Koa Kabushiki Kaisha
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Patent number: 8785787Abstract: A metal-based circuit board, which reduces the influence of thermal expansion, is provided having a structure where an insulating layer A having a large coefficient of thermal expansion is sandwiched between insulating layers B having a small coefficient of thermal expansion. Such a structure allows the insulating layers B to contract and expand so as to suppress contraction and expansion of the insulating layer A and thereby reduce the stress in the direction of negating the stress. As a result, while warpage or distortion is suppressed to be minimal, the bonding strength of the upper and the lower layer is maintained, and degree of freedom for circuit design is not impaired, thereby providing a highly reliable circuit structure.Type: GrantFiled: February 28, 2012Date of Patent: July 22, 2014Assignee: Koa Kabushiki KaishaInventors: Souhei Kouda, Toshiharu Takayama
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Patent number: 8193898Abstract: A laminated body and fabrication method thereof, which allow space saving and control of variation in internal layer resistance, are provided. When forming an internal-layer resistive element 7 in a multilayer ceramic substrate 10, the internal-layer resistive element 7 is connected to exterior electrodes (an upper surface electrode 32 and an undersurface electrode 34) via multiple via-electrodes 3a and 3b arranged in parallel, without a pad electrode adopted in the conventional laminated body. Moreover, in a multilayer ceramic substrate having multiple internal-layer resistive elements arranged in a multilayer structure, multiple internal-layer resistive elements are directly connected via multiple via-electrodes arranged in parallel.Type: GrantFiled: February 28, 2008Date of Patent: June 5, 2012Assignee: Koa Kabushiki KaishaInventor: Isao Tonouchi
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Publication number: 20100097172Abstract: A laminated body and fabrication method thereof, which allow space saving and control of variation in internal layer resistance, are provided. When forming an internal-layer resistive element 7 in a multilayer ceramic substrate 10, the internal-layer resistive element 7 is connected to exterior electrodes (an upper surface electrode 32 and an undersurface electrode 34) via multiple via-electrodes 3a and 3b arranged in parallel, without a pad electrode adopted in the conventional laminated body. Moreover, in a multilayer ceramic substrate having multiple internal-layer resistive elements arranged in a multilayer structure, multiple internal-layer resistive elements are directly connected via multiple via-electrodes arranged in parallel.Type: ApplicationFiled: February 28, 2008Publication date: April 22, 2010Applicant: KOA KABUSHIKI KAISHAInventor: Isao Tonouchi
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Patent number: 7248141Abstract: In order to provide a current fuse with high solderability without containing harmful materials, solder chips containing 30 to 60 percent by weight of zinc, 0.1 to 2 percent by weight of copper, 0.1 to 1 percent by weight of nickel, and the remainder percent by weight being tin, or further containing 0.01 to 0.5 percent by weight of aluminum are inserted into the interior of the electrodes before pressing the electrodes into the ends of the substrate of the fuse, the exterior of the electrodes is heated to melt the solder chips, thereby connecting between the electrodes and the fuse wire.Type: GrantFiled: July 2, 2004Date of Patent: July 24, 2007Assignee: Koa Kabushiki KaishaInventors: Satoru Kobayashi, Kazuyuki Kato
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Patent number: 7238296Abstract: When the entire amount of conductive metal mixed powder made of copper, manganese, and germanium is 100 parts by weight, the metal mixed powder is formed by mixing 4.0 to 13.0 parts manganese by weight, 0.2 to 1.4 parts germanium by weight, and 85.6 to 95.8 parts copper by weight, and 0 to 10 parts glass powder by weight and 0 to 10 parts copper-oxide powder by weight are mixed relative to the entire amount (100 parts by weight) of these metal components. The obtained resistive paste is then baked, and the resistive composition having the low resistance value and low TCR may be obtained. In addition, a resistor is made by forming the resistive element upon a substrate.Type: GrantFiled: August 25, 2003Date of Patent: July 3, 2007Assignee: KOA Kabushiki KaishaInventor: Satoshi Moriya
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Patent number: 7220493Abstract: A solder not containing lead (a lead-free solder) contains zinc and tin, and also contains 5 weight percent or less nickel and 0.5 weight percent or less aluminum with a liquid phase temperature of 260 degrees C. or greater. In addition, a lead-free solder has a liquid phase temperature of 260 degrees C. or greater, and contains 30 to 70 weight percent zinc, 5 weight percent or less nickel, and the remaining weight percent tin. Moreover, a joint is manufactured using these lead-free solders. As a result, a lead-free solder and a lead-free joint having excellent electrical characteristics but not including harmful substances, can be provided.Type: GrantFiled: October 23, 2003Date of Patent: May 22, 2007Assignees: Koa Kabushiki Kaisha, Soldercoat Co., Ltd., Okabe Giken Co., Ltd.Inventors: Satoru Kobayashi, Kazuyuki Kato, Masahiro Sugiura, Saburo Okabe
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Patent number: 7084730Abstract: Electrodes and land patterns are provided at no magnetic flux concentrated positions or at positions that influence the magnetic fluxes issued from the core of a chip coil. The chip coil has a pair of electrodes which is formed at the center of a base on which a core of the chip coil is mounted, lead frames, flange-shaped brims, conductive parts and a conductive wire. The ends of the conductive wire are connected to internal electrodes which are provided on both brims, respectively, and external electrodes are extended so as to protrude from the sides of a core drum. Also, the signal patterns and the land patterns are arranged at the positions that do not allow overlapping with the brims of the core of the chip coil. This allows implementation of a chip coil and a printed circuit board for the same that allow reduction in magnetic loss.Type: GrantFiled: August 23, 2004Date of Patent: August 1, 2006Assignee: Koa Kabushiki KaishaInventor: Masaki Kitagawa
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Patent number: 7081804Abstract: Electrodes of a chip coil are provided at no magnetic flux concentrated positions of a core of the chip coil. In other words, the chip coil has a configuration where: lead frames are provided at the center of the length of both brims of the core; conductive parts and the ends of a conductive wire are connected to internal electrodes, which are made of thin metal films and provided on both brims, respectively; and external electrodes are extended so as to protrude from the sides of a core drum. This reduces magnetic loss and prevents deterioration of characteristics and the Q value due to the electrodes.Type: GrantFiled: December 14, 2004Date of Patent: July 25, 2006Assignee: Koa Kabushiki KaishaInventor: Masaki Kitagawa
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Publication number: 20060104854Abstract: A solder not containing lead (a lead-free solder) contains zinc and tin, and also contains 5 weight percent or less nickel and 0.5 weight percent or less aluminum with a liquid phase temperature of 260 degrees C. or greater. In addition, a lead-free solder has a liquid phase temperature of 260 degrees C. or greater, and contains 30 to 70 weight percent zinc, 5 weight percent or less nickel, and the remaining weight percent tin. Moreover, a joint is manufactured using these lead-free solders. As a result, a lead-free solder and a lead-free joint having excellent electrical characteristics but not including harmful substances, can be provided.Type: ApplicationFiled: October 23, 2003Publication date: May 18, 2006Applicants: Koa Kabushiki Kaisha, Soldercoat Co., Ltd., Okabe Giken Co., Ltd.Inventors: Satoru Kobayashi, Kazuyuki Kato, Masahiro Sugiura, Saburo Okabe
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Patent number: 6936192Abstract: A resistive paste is made by a mixture of a conductive metal powder which is made by mixing 85 to 94 percent by weight of copper powder, 5 to 10 percent by weight of manganese powder, and 1 to 5 percent by weight of tin powder; a mixture of 3 to 7 percent by weight of glass powder and 3 to 7 percent by weight of copper-oxide powder relative to the entire amount of said conductive metal powder; and 7 to 15 percent by weight of vehicle relative to the entire amount of the conductive metal powder and the mixture. The resistive paste is then sintered, and the resistive composition having the low resistance value and low TCR may be obtained. In addition, a resistor is made by forming the resistive element upon a substrate.Type: GrantFiled: September 17, 2003Date of Patent: August 30, 2005Assignee: Koa Kabushiki KaishaInventor: Kouichi Urano
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Patent number: 5858454Abstract: An overcurrent protection device and a method for the production thereof is provided wherein a fusible link is bonded across a pair of electrodes. A composite layer envelops the fusible link and is formed from a gelatinous composition. The composite layer and the fusible link are further encased within a molded housing. The gelatinous composition includes a nonconductive inorganic powder and a synthetic resin. The inorganic powder has a melting temperature below a fusion temperature of the fusible link. In an embodiment, the inorganic powder includes lead glass powder and alumina powder, and the synthetic resin is a low viscosity silicone resin. The inorganic powder is mixed with the silicone resin in a three to one ratio. Heat treatment dries the composite layer. The composite layer includes air pockets between particles of the inorganic powder elastically bound together by the synthetic resin.Type: GrantFiled: December 27, 1996Date of Patent: January 12, 1999Assignee: KOA Kabushiki KaishaInventors: Michiaki Kiryu, Satoru Kobayashi
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Patent number: 5572181Abstract: An overcurrent protection device and a method for the production thereof is provided wherein a fusible link is bonded across a pair of electrodes. A composite layer envelops the fusible link and is formed from a gelatinous composition. The composite layer and the fusible link are further encased within a molded housing. The gelatinous composition includes a nonconductive inorganic powder and a synthetic resin. The inorganic powder has a melting temperature below a fusion temperature of the fusible link. In an embodiment, the inorganic powder includes lead glass powder and alumina powder, and the synthetic resin is a low viscosity silicone resin. The inorganic powder is mixed with the silicone resin in a three to one ratio. Heat treatment dries the composite layer. The composite layer includes air pockets between particles of the inorganic powder elastically bound together by the synthetic resin.Type: GrantFiled: April 29, 1994Date of Patent: November 5, 1996Assignee: KOA Kabushiki KaishaInventors: Michiaki Kiryu, Satoru Kobayashi
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Patent number: D388534Type: GrantFiled: December 5, 1996Date of Patent: December 30, 1997Assignee: Koa Kabushiki Kaisha (Kao Corporation)Inventors: Tomohiro Uemura, Koichi Ishida