Patents Assigned to Korea Advanced Nano Fab Center
  • Patent number: 10418495
    Abstract: A gallium nitride-based sensor having a heater structure and a method of manufacturing the same are disclosed, the method including growing an n-type or p-type GaN layer on a substrate, growing a barrier layer on the n-type or p-type GaN layer, sequentially growing a u-GaN layer and a layer selected from among an AlxGa1-xN layer, an InxAl1-xN layer and an InxAlyGa1-x-yN layer on the barrier layer, patterning the n-type or p-type GaN layer to form an electrode, forming the electrode along the pattern formed on the n-type or p-type GaN layer, and forming a sensing material layer on the layer selected from among the AlxGa1-xN layer, the InxAl1-xN layer and the InxAlyGa1-x-yN layer, wherein a HEMT sensor or a Schottky diode sensor can be heated using an n-GaN (or p-GaN) layer, thus increasing the sensitivity of the sensor and reducing the restoration time.
    Type: Grant
    Filed: September 13, 2018
    Date of Patent: September 17, 2019
    Assignee: KOREA ADVANCED NANO FAB CENTER
    Inventors: Kyungho Park, Chuyoung Cho, Hyeong Ho Park, Yu Min Koh
  • Publication number: 20190097067
    Abstract: A gallium nitride-based sensor having a heater structure and a method of manufacturing the same are disclosed, the method including growing an n-type or p-type GaN layer on a substrate, growing a barrier layer on the n-type or p-type GaN layer, sequentially growing a u-GaN layer and a layer selected from among an AlxGa1-xN layer, an InxAl1-xN layer and an InxAlyGa1-x-yN layer on the barrier layer, patterning the n-type or p-type GaN layer to form an electrode, forming the electrode along the pattern formed on the n-type or p-type GaN layer, and forming a sensing material layer on the layer selected from among the AlxGa1-xN layer, the InxAl1-xN layer and the InxAlyGa1-x-yN layer, wherein a HEMT sensor or a Schottky diode sensor can be heated using an n-GaN (or p-GaN) layer, thus increasing the sensitivity of the sensor and reducing the restoration time.
    Type: Application
    Filed: September 13, 2018
    Publication date: March 28, 2019
    Applicant: KOREA ADVANCED NANO FAB CENTER
    Inventors: Kyungho Park, Chuyoung Cho, Hyeong Ho Park, Yu Min Koh
  • Patent number: 8999825
    Abstract: This invention relates to a method of healing defects at junctions of a semiconductor device, which includes growing a p-Ge layer on a substrate, performing ion implantation on the p-Ge layer to form an n+ Ge region or performing in-situ doping on the p-Ge layer and then etching to form an n+ Ge region or depositing an oxide film on the p-Ge layer and performing patterning, etching and in-situ doping to form an n+ Ge layer, forming a capping oxide film, performing annealing at 600˜700° C. for 1˜3 hr, and depositing an electrode, and in which annealing enables Ge defects at n+/p junctions to be healed and the depth of junctions to be comparatively reduced, thus minimizing leakage current, thereby improving properties of the semiconductor device and achieving high integration and fineness of the semiconductor device.
    Type: Grant
    Filed: November 21, 2013
    Date of Patent: April 7, 2015
    Assignees: Korea Advanced Nano Fab Center, Sungkyunkwan University Research & Business Foundation
    Inventors: Won Kyu Park, Jong Gon Heo, Dong Hwan Jun, Jin Hong Park, Jae Woo Shim
  • Publication number: 20140187021
    Abstract: This invention relates to a method of healing defects at junctions of a semiconductor device, which includes growing a p-Ge layer on a substrate, performing ion implantation on the p-Ge layer to form an n+ Ge region or performing in-situ doping on the p-Ge layer and then etching to form an n+ Ge region or depositing an oxide film on the p-Ge layer and performing patterning, etching and in-situ doping to form an n+ Ge layer, forming a capping oxide film, performing annealing at 600˜700° C. for 1˜3 hr, and depositing an electrode, and in which annealing enables Ge defects at n+/p junctions to be healed and the depth of junctions to be comparatively reduced, thus minimizing leakage current, thereby improving properties of the semiconductor device and achieving high integration and fineness of the semiconductor device.
    Type: Application
    Filed: November 21, 2013
    Publication date: July 3, 2014
    Applicant: Korea Advanced Nano Fab Center
    Inventors: Won Kyu Park, Jong Gon Heo, Dong Hwan Jun, Jin Hong Park, Jae Woo Shim