Patents Assigned to Leader Electronics Corp.
  • Publication number: 20240121380
    Abstract: A resolution measurement method performed by a computer device for a camera comprises: generating a distortion map which represents a correspondence relation between coordinates of all pixels of a first test chart and coordinates of all pixels of the first test chart in an image captured by a camera which causes distortion in a photography field of view; generating, according to the correspondence relation represented by the distortion map, a distorted test chart which is a distorted image of a second test chart that is used for measuring resolution at a specific area in the first test chart in the captured image and performing, by using the distorted test chart, measurement of resolution according to a contrast method at a part, that corresponds to the specific area, in the photography field of view of the camera.
    Type: Application
    Filed: February 10, 2021
    Publication date: April 11, 2024
    Applicant: Leader Electronics Corp.
    Inventor: Kouichi TODA
  • Publication number: 20220394200
    Abstract: To generate training data based on normal content and anomalous content generated from the normal content. A training data generation method for generating training data used for generating a learned model for determining whether there is an anomaly in an inspection target, the training data generation method including: receiving normal content regarding the inspection target and anomalous content generated from the normal content; and generating training data based on a set of the normal content and one or more pieces of the anomalous content.
    Type: Application
    Filed: September 17, 2020
    Publication date: December 8, 2022
    Applicant: Leader Electronics Corp.
    Inventor: Xiaodong WANG
  • Patent number: 9813699
    Abstract: A marker generating method is provided for facilitating the finding of positions which correspond to one another among a plurality of images associated with a video signal. A position within an image (800) associated with a video signal is selected, with a cursor (802, 804) to display a marker (812, 822-826) at a position corresponding to the selected position, in a different image (810, 820) associated with the video signal.
    Type: Grant
    Filed: May 18, 2012
    Date of Patent: November 7, 2017
    Assignee: Leader Electronics Corp.
    Inventors: Yuji Amino, Yoshihiro Sakamoto
  • Patent number: 9538050
    Abstract: A jitter-associated data generator is provided for generating data associated with jitter. The jitter-associated data generator comprises a first circuit, a second circuit, and a third circuit. The first circuit generates an output including frequency components in a first frequency band common to first and second jitter, from a received digital input, as digital data associated with first jitter. The second circuit generates an output including frequency components in a second frequency band corresponding to the difference between the first and second jitter, from the received input, as differential digital data. The third circuit generates an output including frequency components in a third frequency band including the first and second frequency bands, from the received first jitter-associated digital data and differential digital data, as digital data associated with the second jitter.
    Type: Grant
    Filed: December 24, 2013
    Date of Patent: January 3, 2017
    Assignee: LEADER ELECTRONICS CORP.
    Inventor: Kensuke Yoshida
  • Publication number: 20150146013
    Abstract: A marker generating method is provided for facilitating the finding of positions which correspond to one another among a plurality of images associated with a video signal. A position within an image (800) associated with a video signal is selected, with a cursor (802, 804) to display a marker (812, 822-826) at a position corresponding to the selected position, in a different image (810, 820) associated with the video signal.
    Type: Application
    Filed: May 18, 2012
    Publication date: May 28, 2015
    Applicant: Leader Electronics Corp.
    Inventors: Yuji Amino, Yoshihiro Sakamoto
  • Publication number: 20140184907
    Abstract: A jitter-associated data generator is provided for generating data associated with jitter. The jitter-associated data generator comprises a first circuit, a second circuit, and a third circuit. The first circuit generates an output including frequency components in a first frequency band common to first and second jitter, from a received digital input, as digital data associated with first jitter. The second circuit generates an output including frequency components in a second frequency band corresponding to the difference between the first and second jitter, from the received input, as differential digital data. The third circuit generates an output including frequency components in a third frequency band including the first and second frequency bands, from the received first jitter-associated digital data and differential digital data, as digital data associated with the second jitter.
    Type: Application
    Filed: December 24, 2013
    Publication date: July 3, 2014
    Applicant: Leader Electronics Corp.
    Inventor: Kensuke Yoshida
  • Publication number: 20090034597
    Abstract: A test signal generator 2 comprises a Pseudo Random Binary bit Sequence generator 20 for generating a Pseudo Random Binary bit Sequence in the form of burst while holding the continuity of the code, and intermittently operates in a burst form in response to operation control signals from circuits 22, 24. During one burst duration, a string of Pseudo Random Binary bit Sequence is generated in a certain sequence, where the first codes in the Pseudo Random Binary bit String generated in this burst duration follows the last code of a Pseudo Random Binary bit String generated in the preceding burst duration.
    Type: Application
    Filed: September 10, 2007
    Publication date: February 5, 2009
    Applicant: Leader Electronic Corp.
    Inventors: Kazumi Kobayashi, Susumu Akada
  • Patent number: 7193449
    Abstract: A multi-phase signal generating apparatus is provided for readily generating multiple phase signals. The multi-phase signal generating apparatus comprises a signal data storage which stores a plurality of data segments for determining a predetermined period of one signal. A data segment selector circuit selects segments for constituting the phase signals from a plurality of data segments stored in the signal data storage for determining the predetermined period of a signal in each of a plurality of segment intervals which make up a phase signal cycle for generating a phase signal. Each phase signal generator circuit forms each phase signal using a plurality of selected segments for each phase signal during a plurality of segment intervals.
    Type: Grant
    Filed: October 26, 2004
    Date of Patent: March 20, 2007
    Assignee: Leader Electronics Corp.
    Inventor: Kenichi Ishihara
  • Patent number: 6006089
    Abstract: A system for measuring electric field strength of radio waves transmitted from cell station and arriving at an arbitrary measuring location is provided that includes a tuner unit, cell station ID (CS-ID) demodulator unit, signal level (or electric field strength) detector (RSSI detector), memory unit, display unit, and controller (CPU). CS-ID codes included in radio waves from cell stations and transmitted to an arbitrary measuring location are detected by the demodulator unit, and electric field strength (RSSI) data of the received radio waves are detected by the RSSI detector. All sets of the CS-ID and RSSI data are stored at addresses in the memory unit corresponding to each of the measuring locations, and the stored sets of the CS-ID data and RSSI data are read from the memory unit and displayed on the display unit in association with information indicative of the measuring location.
    Type: Grant
    Filed: March 5, 1997
    Date of Patent: December 21, 1999
    Assignee: Leader Electronics Corp.
    Inventors: Kenji Sasaki, Masaaki Nagai
  • Patent number: 5933129
    Abstract: A signal waveform display system for displaying waveforms of one or two input signals on a display screen is provided which comprises first-third input switching circuits, first and second trigger generators, first and second horizontal sweep generators, and a composite horizontal sweet generator. The trigger generators respectively generates first and second trigger pulses synchronously with the input signals provided thereto through the first and second input switching circuits. The sweep generators are triggered by the trigger pulses and generate first and second sweep signals having variable time periods, respectively. The composite sweep generator generates a composite sweep signal including lower portions of the first sweep signal which are smaller than a reference voltage, and upper portions of the second sweep signal which are higher than the reference voltage.
    Type: Grant
    Filed: May 28, 1997
    Date of Patent: August 3, 1999
    Assignee: Leader Electronics Corp.
    Inventors: Haruhisa Egami, Tohru Furuse
  • Patent number: 5897608
    Abstract: A compensating method and apparatus is provided which collectively compensates for variations in a variety of characteristics in respective circuit portions of a signal processing circuit. A correction data generator is provided for generating correction value data for correction to be made for an output signal of the signal processing circuit, in order to compensate for variations in the characteristics of the at least one circuit portion. Also, a compensator is connected to receive an output signal from the signal processing circuit as well as to receive the correction value data from the correction data generating means, for correcting the output signal in accordance with the respective correction value data corresponding to the at least one circuit portion to generate a compensated output signal.
    Type: Grant
    Filed: May 27, 1997
    Date of Patent: April 27, 1999
    Assignee: Leader Electronics, Corp.
    Inventors: Itoshi Yokoyama, Masaaki Nagai, Yoshimichi Sanada
  • Patent number: 5827619
    Abstract: A battery holder incorporated in an electrical device is provided which includes a housing for holding a battery which supplies a voltage to electrical circuits of the device. The battery holder contains positive and negative side contacts fixed to the housing for connecting positive and negative electrodes of the battery to supply a voltage to electrical loads. The positive side contact includes a back plate fixed to the housing, a conductive contact plate for contacting the positive electrode of the battery, the contact plate forming a U-shaped or V-shaped spring together with the back plate, and at least two protective plates of an insulation material arranged along the outer periphery of the contact plate and protruding from it. The distance between the protective plate is defined to be larger than the diameter of the positive electrode of the battery and smaller than the diameter of the battery itself.
    Type: Grant
    Filed: February 18, 1997
    Date of Patent: October 27, 1998
    Assignee: Leader Electronics Corp.
    Inventor: Fumio Iida
  • Patent number: 5768312
    Abstract: An evaluator for evaluating a digital transmission system is provided which comprises a signal power decrease detector and a system margin evaluator. The signal power decrease detector receives a digital signal which has been transmitted through the transmission medium of a transmission system so as to generate a signal power decrease signal. The system margin evaluator evaluates the system margin of the transmission system in response to the signal power decrease signal. The system margin of the digital transmission system can be evaluated in a simple and convenient manner.
    Type: Grant
    Filed: February 17, 1995
    Date of Patent: June 16, 1998
    Assignee: Leader Electronics Corp.
    Inventor: Genichi Imamura
  • Patent number: 5742275
    Abstract: An apparatus for displaying a waveform of an input signal on a display includes a synchronization detecting circuit, a sweep generating circuit, a horizontal axis drive circuit, a switching circuit, a variable gain amplifier, a vertical axis drive circuit, and a vertical location arrangement circuit. The horizontal axis drive circuit drives the horizontal axis of the display on the basis of a sweep signal generated at the sweep generating circuit synchronously with a sweep trigger signal obtained by dividing synchronization detecting pulses from the synchronization detecting circuit by N (N-1, 2, . . . ). The switching circuit alternately transfers the input signal and a cursor signal at a high rate to provide a multiplexed input/cursor signal to the vertical axis drive circuit through the variable gain amplifier.
    Type: Grant
    Filed: September 14, 1994
    Date of Patent: April 21, 1998
    Assignee: Leader Electronics Corp.
    Inventor: Kentaro Ozawa
  • Patent number: 5677501
    Abstract: A flow display type indicator is provided which indicates the variation or the velocity of variation of the value of a physical quantity or a parameter in a readily identifiable form. The indicator includes a flow image forming unit to indicate the value of the predetermined physical quantity in a flow representation by enabling a flow representing image to be formed at one of a plurality of positions including first to n-th positions which are orderly disposed and offset from each other along a predetermined line. A flow image selector selects one from flow representing images at the first to the n-th positions in one of first and second directions depending on the polarity of an input signal at a speed in accordance with the magnitude of the input signal to allow the flow representing image forming unit to form a selected flow representing image.
    Type: Grant
    Filed: August 8, 1996
    Date of Patent: October 14, 1997
    Assignee: Leader Electronics Corp.
    Inventors: Ei Kawaguchi, Masaaki Nagai
  • Patent number: 5677742
    Abstract: The apparatus for displaying a clamp point on a screen includes an input amplifier; a clamp circuit which includes a sync separation circuit and a one shot; and a blanking circuit. The video signal is applied to the clamp circuit via the input amplifier and the output signal therefrom is applied to the blanking circuit to be modulated with respect to its brightness. Thus, the brightness-modulated clamp point is readily located on a screen of, for example, an oscilloscope.
    Type: Grant
    Filed: September 14, 1994
    Date of Patent: October 14, 1997
    Assignee: Leader Electronics Corp.
    Inventor: Kentaro Ozawa
  • Patent number: 5555515
    Abstract: An apparatus and method for generating a linearly filtered composite signal, wherein the original signal of said composite signal can be divided into a plurality of sequentially arranged original sub-signals. The apparatus having a plurality of memory (1.sub.1, 1.sub.2) which have stored filtered sub-signals y.sub.1 (n), y.sub.2 (n) obtained by linearly filtering the original sub-signals, respectively; an adder (5) for adding data of the sub-signals y.sub.1 (n), y.sub.2 (n) read out from the memory to provide the resultant data y.sub.1 (n)+y.sub.2 (n) to an output terminal of the apparatus; and a controller for controlling timings of providing the data of the sub-signals stored in the memory to the adder.
    Type: Grant
    Filed: July 22, 1994
    Date of Patent: September 10, 1996
    Assignee: Leader Electronics Corp.
    Inventors: Hiroyuki Tomita, Koichi Saito
  • Patent number: 5526042
    Abstract: An apparatus for displaying line and frame waveforms having different time-scales of a video signal on a display screen is described which comprises complex sweep signal generating means including a line sweep signal generating circuit 2, a frame sweep signal generating circuit 3 and a switching circuit 4, and horizontal axis drive circuit including a horizontal location arrangement circuit 5 and a horizontal axis drive circuit 6. The line and frame sweep signal generating circuits 2 and 3 generate line and frame sweep signals S.sub.2 and S.sub.3 synchronously with line and frame synchronization signals of the video signal, respectively, and the switching circuit 4 alternatively transfers the line and frame sweep signals S.sub.2 and S.sub.3, synchronously with the frame synchronization signal to generate a complex sweep signal S.sub.4.
    Type: Grant
    Filed: September 14, 1994
    Date of Patent: June 11, 1996
    Assignee: Leader Electronics Corp.
    Inventors: Kentaro Ozawa, Haruhisa Egami
  • Patent number: 5517156
    Abstract: A digital phase shifter is provided which uses a direct digital synthesizer. The digital phase shifter is provided with a digital phase-shifted waveform signal generator in which a plurality of digital phase-shifted waveform signals having different phase shifts are stored. The generator outputs a digital phase-shifted waveform signal corresponding to a specified phase shift from a phase shift specifying section in synchronism with an oscillation signal from a PLL circuit. The output is converted to an analog form by a D/A convertor to generate a phase-shifted waveform.
    Type: Grant
    Filed: October 7, 1994
    Date of Patent: May 14, 1996
    Assignee: Leader Electronics Corp.
    Inventor: Kenzo Ikuzawa
  • Patent number: 5450623
    Abstract: A measuring apparatus is provided which is capable of measuring CN ratio. The measuring apparatus has a measuring band specifying unit for specifying a band under measurement; a display for displaying the spectrum of levels measured in the specified band; first and second noise measuring frequency specifying units; a transmission channel selector; and a CN ratio calculating unit for estimating a noise level at a carrier of a selected transmission channel and for calculating the CN ratio using the estimated level.
    Type: Grant
    Filed: September 17, 1993
    Date of Patent: September 12, 1995
    Assignee: Leader Electronics Corp.
    Inventors: Itoshi Yokoyama, Masaaki Nagai, Kenichi Ishida, Kakuya Saito