Abstract: A semiconductor memory device and method of fabricating the same, which improves adhesion of the lower electrode of a ferroelectric planar capacitor, and prevents inter-diffusion between the Pt electrode of the capacitor and adhesion layer placed under the Pt electrode. The semiconductor memory device includes an insulating layer formed on a substrate, a paraelectric layer formed on the insulating layer, and a conductive layer formed on the paraelectric layer.

Abstract: A method for fabricating a bipolar device, including the steps of forming an epitaxial growth retarding layer on a substrate at a predetermined angle, forming a collector layer on the substrate so that the collector layer is adjacent the epitaxial growth retarding layer and has an inclined portion formed over an edge portion of the epitaxial growth retarding layer, forming a base layer having an inclined portion on the collector layer, and forming an emitter layer on the inclined portion of the base layer.

Abstract: A solid state image sensor device and a method of fabricating the same are disclosed in the present invention. A solid state image sensor device includes a semiconductor substrate, a well region in the semiconductor substrate, a horizontal charge transmission region in the well region, a plurality of insulating layers in the horizontal charge transmission region, a gate insulating layer on the entire surface including the insulating layers, a plurality of first polygates on the gate insulating layer, the first polygates being separated from each other and overlapping a portion of each insulating layer, a plurality of impurity regions in the horizontal charge transmission region at both sides of each first polygate, an interlayer insulating layer on the entire surface including the first polygates, and a plurality of second polygates on the interlayer insulating layer and overlapped with a portion of each first polygate.

Abstract: The present invention relates to a diffusion barrier layer for a semiconductor device and fabrication method thereof. The diffusion barrier layer according to the present invention is fabricated by forming a diffusion barrier layer containing a refractory metal material and an insulating material on an insulating layer and in a contact hole, wherein the insulating layer being partially etched to form the contact hole, is formed on a semiconductor substrate; and annealing the diffusion barrier layer. Therefore, an object of the present invention is to provide a diffusion barrier layer for a semiconductor device, which is of an amorphous or microcrystalline state and thermodynamically stable even at a high temperature since an insulating material is bonded to a refractory metal material in the diffusion barrier layer.

Abstract: In a semiconductor memory device including memory cells and a peripheral circuit unit, a memory cell has a first gate structure formed on a semiconductor substrate; a first impurity region of a first conductive type formed in the substrate on a first side of the gate structure; and a second impurity region formed in the substrate on a second side of the gate structure, the second impurity region including: a third impurity region of the first conductive type, a fourth impurity region of the first conductive type between the third impurity region and the second side of the gate structure, and a halo ion region of a second conductive type formed adjacent to the fourth impurity region.

Abstract: An encapsulation method for a ball grid array (BGA) semiconductor package, includes: adhering one sided adhesive tape to an upper portion of the semiconductor package after performing a wire bonding; carrying out a molding by using a mold having a groove of a certain size inside; and removing the one side adhesive tape after completing the molding, whereby a flash is prevented from occurring during the BGA encapsulation process.

Abstract: A semiconductor device is disclosed, including: a semiconductor substrate; a gate electrode formed on the semiconductor substrate; a first gate insulating layer formed between the gate electrode and semiconductor substrate, and formed at a first region including one edge of the gate electrode; a second gate insulating layer formed between the gate electrode and semiconductor substrate, and formed at a second portion including the other edge of the gate electrode, the second gate insulating layer being thicker than the first gate insulating layer; a first impurity region formed in a predetermined portion of the semiconductor substrate, placed on both sides of the gate electrode; and a second impurity region formed in a predetermined portion of the semiconductor substrate, placed under the second gate insulating layer.

Abstract: The present invention provides an answering system for a communication device which, when set up with an automatic answering mode because a called party is absent or does not want to answer it, responds to a calling party by outputting automatically an responding message that a telephone of the called party is set up with an automatic answering mode for a predetermined time, whereby an user of the calling party is informed that an automatic answering mode of a telephone of a called party is activated although the communication has not completed yet. Accordingly, an user of the calling party pays no bill which is unnecessary when an automatic answering mode is activated on a telephone of the calling party, and the efficiency of communication system increases since the phone lines are free from the unnecessary phone calls.

Abstract: A method of transmitting a frame on a communications medium by a node of a local area network in which a node without priorit employs a conventional IEEE 802.3 CSMA/CD medium-access method and a node with priority employs the conventional IEEE 802.3 CSMA/CD medium-access method less the steps of delaying transmission by minimum inter-frame and random back-off intervals.

Abstract: A CCD and method of fabricating the same, which reads signal charges completely and increases the fill factor of its pixel, to improve the sensitivity. The CCD having photodiodes in matrix form, includes a first interlevel insulating layer and first transfer gate sequentially formed between the photodiodes arranged in the row direction, a block insulating layer formed along the center of the first transfer gate, a second interlevel insulating layer formed on the first transfer gate, second and third transfer gates formed on the first transfer gate, being isolated from each other on the block insulating layer, a third interlevel insulating layer formed on the second and third transfer gates, and a fourth transfer gate formed on the third interlevel insulating layer, being placed on the second and third transfer gates.

Abstract: A method of fabricating a thin film transistor includes the steps of forming an active layer on a substrate, forming a gate insulating layer covering the active layer and the substrate, forming a gate on a portion of the gate insulating layer and over the active layer, forming an insulating interlayer on the gate insulating layer to cover the gate, forming contact holes exposing a portion of the active layer by patterning the insulating interlayer and the gate insulating layer, and forming a heavily doped region by heavily doping the portion of the active layer exposed by the contact holes.

Abstract: A gate driving circuit in a liquid crystal display is disclosed which can minimize a power consumption by avoiding unnecessary drive of gate line drivers. The gate driving circuit is used in a liquid crystal display having a liquid crystal panel with thin film transistors and pixel electrodes for displaying an image, a source driving circuit for applying video data to a source line in the liquid crystal panel, and a gate driving circuit for applying a driving signal to a gate line in the thin film transistors. The gate driving circuit includes a plurality of gate line drivers connected in series for applying the driving signal to the gate line, and a plurality of clock generation controlling units corresponding to the plurality of gate line drivers each for controlling a timing of a clock signal to a respective gate line driver, thereby controlling a driving timing of the respective gate line driver.

Abstract: Solid state image sensor having photodiode regions for converting optical image signal into an electrical signal and charge coupled device regions for transferring video charges generated in the photodiode regions in one direction, including first microlens layers spaced from one another and formed over the photodiode regions to be opposite thereto for focusing lights onto the photodiode regions, and second microlens layers formed of a material having a refractive index greater than the first microlens layers on an entire surface of the first microlens layers for focusing lights incident to edge portions of the first microlens layers and spaces between the first microlens layers onto the photodiode regions.

Abstract: BLP stack is disclosed which has a higher reliability and a less area of mounting for providing a denser package, including a first package having external power connection leads each started to be exposed through a bottom thereof and extended to a top surface through a side surface inclusive of bottom lead portions on a bottom surface, side lead portions on a side surface, and upper lead portions on a top surface, and a second package having external power connection leads started to be exposed through a bottom thereof and brought into contact with the external power connection leads on the first package to be electrically connected thereto.

Abstract: Device and method for controlling a PCI ethernet in data transmission between a host computer and various media, is disclosed, the method including the steps of (1) storing data to be transmitted in a memory in succession until an amount of the data becomes greater than a threshold value when the data is transmitted in succession, (2) keeping the data stored in the memory as they are and storing data in the memory again starting from data which is not stored in the memory yet if an underrun occurs in the middle of data transmission and storing data in the memory again from beginning of the data if an error other than the underrun is occurred, and (3) determining completion of transmission of one full packet of data if no error is occurred, whereby shortening a time period required for transmission of data from a host computer to various media.

Abstract: A semiconductor device which is applied to access transistors of an SRAM cell to improve its operation performance and a method for fabricating the same are disclosed. The semiconductor device includes a gate insulating layer formed on a semiconductor substrate, a gate electrode formed on the gate insulating layer, lightly doped impurity regions having different lengths beneath surface of the semiconductor substrate at first and second sides of the gate electrode, and heavily doped impurity regions formed beneath the surface of the semiconductor substrate, extending from the lightly doped impurity regions.

Abstract: A metal line of a semiconductor device and method of fabricating the same are provided in which the metal line deterioration due to electromigration is minimized to improve its reliability.

Abstract: The charge coupled device (CCD) formed according the method of the present invention includes a substrate, at least two photodiodes formed in the substrate and a first insulating layer formed on the substrate. A first transfer gate is formed on a portion of the first insulating layer between the photodiodes. A second insulating layer covers the first transfer gate, and has a projecting portion projecting up from the first transfer gate. The CCD further includes second and third transfer gates disposed over respective sides of the projecting portion of the second insulating layer and the first transfer gate with the second and third transfer gates having a gap therebetween over the projecting portion. A third insulating layer covers the second and third transfer gates, and a fourth transfer gate is formed over a portion of the second and third transfer gates and over the projecting portion of the second insulating layer.

Abstract: A metal-oxide-semiconductor (MOS) device in which the nonuniform dopant concentration in the channel region is obtained by means of ion implantation through a polysilicon gate electrode of nonuniform cross section, which is itself obtained by oxidizing the polysilicon using a semirecessed LOCOS process.

Abstract: A wire in a semiconductor device and the fabricating the same are disclosed in the present invention. A semiconductor device includes a semiconductor substrate, a plurality of conductive layers on the semiconductor substrate, and an insulating layer on the semiconductor substrate including the conductive layers, the insulating layer having at least one void between each adjacent conductive layer.