Abstract: An input protection circuit which makes it possible to protect an internal circuit with respect to withstanding an electro-static charge by forming multiple discharge loops by connecting each input pad via an input protection circuit. The circuit includes a plurality of pads formed on a P well within a substrate, first discharge paths formed between neighboring pads, and a second discharge path formed between the pads and circuit ground.

Abstract: A dynamic random access memory (DRAM) organized as a matrix of basic organizational units each having a capacitor pair. Each capacitor pair has one of the first capacitors and one of the second capacitors in it.

Abstract: A viscous fluid discharging apparatus is provided for removing air bubbles introduced during the passing of the viscous fluid before being supplied to the substrate. A viscous fluid discharging apparatus according to the present invention includes a viscous fluid storing container, a viscous fluid supplying pump, a viscous fluid filter, and a viscous fluid discharging mechanism provided with a final air bubble filtering means. The fluid material discharging mechanism includes a connecting portion formed on an end of a temperature adjusting mechanism connected to an outlet of the fluid material supplying pump, and a discharging gun. The discharging gun has a sealed joining portion for being sealed and joined to the connecting portion, an air bubble capturing portion for capturing air bubbles from within the viscous fluid, and a viscous fluid path for moving the viscous fluid to an outlet in a sealed state.

Abstract: A method for correcting defects in a phase shift mask is disclosed. The method includes the steps of: forming an etch stopper layer and a phase shift layer on a substrate in succession; forming light shielding layer patterns on the phase shift layer, the light shielding layer patterns having a plurality of opened regions; defining phase shift regions on selected regions of the phase shift layer in the opened regions; selectively removing the phase shift layer in the phase shift regions to a thickness required for phase shifting; and eliminating a defect by simultaneous further etching the same amount of material from the defective phase shift layer and an adjacent open region. This corrects the defect by converting the defective phase shift region to a non-phase-shift region and converting the adjacent open region into a phase shift region.

Abstract: A column selection circuit is disclosed, in which a layout area is minimized by reducing the number of data bus lines and sensing speed characteristic is improved by reducing sensing time of a bit line.

Abstract: A method for pretreating a semiconductor surface, comprising the steps of: placing a titanium nitride substrate in a reaction chamber and subjecting the reaction chamber to vacuum; purging the reaction chamber with an inert gas selected from the group consisting of N.sub.2, Ar and He and evacuating the reaction chamber into 1 mTorr or lower; treating the surface of the titanium nitride substrate with a reaction gas comprising WF; charging a reducing gas and a source gas for deposition material to form a thin film on the titanium nitride substrate, by which the nucleation rate of deposition material and the number of nucleation sites on the substrate can be increased and a thin film with a uniform thickness and high density can be formed on the substrate.

Abstract: A method of forming a thin film of copper on a substrate includes a first step of conducting a chemical vapor deposition (CVD) process using a metal organic (MO) source while applying a first bias voltage to the surface of the substrate and a second step of conducting a chemical vapor deposition process using a metal organic source while applying a second bias voltage to the substrate, wherein the second bias voltage is opposite in polarity to the first bias voltage. The process may include a third step of conducting a chemical vapor deposition process using a metal organic source while applying a third bias voltage to the substrate, where the third bias voltage has the same polarity as the first bias voltage.

Abstract: An electrostatic-discharge (ESD) protecting circuit of a semiconductor device prevents damage from an ESD applied to an internal circuit through an input or output pad. The thickness of respective gate insulating layers of respective active devices of the electrostatic-discharge protecting circuit and internal circuit, which are formed within a given radius in the range of about 350.mu.m to about 1000.mu.m from the electrostatic-discharge protecting circuit, is thicker than the thickness of gate insulating layers of active devices formed outside the radius.

Abstract: A semiconductor package having outer leads which are not protruded from the package but only exposed to outside. The semiconductor package comprises a semiconductor chip which is formed with a plurality of bond pads at a central portion of its bottom surface, a lead frame including leads connected to bond pads for input/output of the bond pads respectively and bus bars connected to power supplying pads of the bond pads, insulation adhesives for attaching inner leads of the leads and inner leads of the bus bars to a bottom surface of the semiconductor chip formed with the bond pads, metal wires for electrically connecting the inner leads of the leads and the inner leads of the bus bars to the bond pads respectively, and a molding compound enveloping the semiconductor chip assembly with outer leads of the lead frame exposed to outside. The adhesive tapes are removed after a molding procedure.