Patents Assigned to Lucata Corporation
  • Patent number: 10896127
    Abstract: A system and method for identifying from an address an appropriate target node and a location in that node that holds desired data related to that address is provided. The system and method includes a logical address generator that generates a logical address. The system and method includes a subspace index extraction module that extracts a subspace index from the logical address. The system and method includes a subspace configuration table that retrieves a plurality of parameters of the subspace index to locate the desired data.
    Type: Grant
    Filed: January 22, 2014
    Date of Patent: January 19, 2021
    Assignee: Lucata Corporation
    Inventor: Peter M. Kogge
  • Patent number: 10853251
    Abstract: A method of performing diadic operations in a processor is provided that includes receiving a first request packet initiating a read operation from a first memory address in the first request packet, and executing a first operation in the first request packet once the read request is completed. Also, the method includes generating a second request packet at a second memory address by combining the results of the first operation with the unused information in the first request packet. Furthermore, the method includes sending the second request packet to the Memory-Side Processor (MSP). When the MSP receives the second request, the MSP checks to determine if a write operation is requested and writes data to the second memory address, if a read operation is requested, the MSP reads data from the second memory address.
    Type: Grant
    Filed: August 21, 2019
    Date of Patent: December 1, 2020
    Assignee: Lucata Corporation
    Inventor: Martin M. Deneroff
  • Patent number: 10628310
    Abstract: A method of performing diadic operations in a processor is provided that includes receiving a first request packet initiating a read operation from a first memory address in the first request packet, and executing a first operation in the first request packet once the read request is completed. Also, the method includes generating a second request packet at a second memory address by combining the results of the first operation with the unused information in the first request packet. Furthermore, the method includes sending the second request packet to the Memory-Side Processor (MSP). When the MSP receives the second request, the MSP checks to determine if a write operation is requested and writes data to the second memory address, if a read operation is requested, the MSP reads data from the second memory address.
    Type: Grant
    Filed: February 7, 2018
    Date of Patent: April 21, 2020
    Assignee: Lucata Corporation
    Inventor: Martin M. Deneroff