Abstract: This invention relates to a voltage regulated circuit, more particularly, to a voltage regulated circuit with a well resistor divider. The present invention applies two well resistors act as the voltage regulated circuit and uses the characteristic of the well resistor in the resistance value, which is increased following the voltage that is transmitted to the well resistor to make an output voltage become a stable value. When the input voltage is an instable and over-high value, the depletion region in the well resistor will extend to absorb the over-high voltage value and make the output voltage to become a stable voltage value.

Abstract: A method for forming a metal/dielectric multi-layered interconnect. A conductive layer is formed over a substrate. A protective film is formed over the conductive layer. A first high-density plasma fluorinated silica glass (HDP-FSG) layer is formed over the substrate by performing a HDP chemical vapor deposition with a low bias-voltage power. A second HDP-FSG layer is formed over the first HDP-FSG film by performing a HDP chemical vapor deposition at a higher bias-voltage power. A chemical-mechanical polishing is carried out to planarize the FSG layer. A silicon oxynitride is formed over the FSG layer. A via opening is formed in the FSG layer above the conductive layer. A barrier layer is formed onto the via opening and silicon oxynitride. Tungsten is deposited over the substrate filling the via opening. A tungsten chemical-mechanical polishing is carried out to remove excess tungsten and barrier layer above the silicon oxynitride layer.

Abstract: A portion of a differential charge pump circuit is partially replicated and is utilized as a replica circuit to define the common-mode voltage VCM of the differential output voltages of the charge pump circuit that drives a voltage controlled oscillator (VCO) in a PLL system application, or a voltage-controlled delay (VCD) circuit in a DLL system application. The replica circuit includes a high gain operational amplifier and at least three MOS transistors electrically coupled to the differential charge pump circuit. The operational amplifier generates the DC output voltage VO which is used to define the common-mode voltage VCM of the charge pump circuit. The three transistors are configured in replica of one-half of the charge pump circuit. The operational amplifier is provided with a bias voltage at the inverting-end input terminal.