Abstract: Embodiments described herein provide circuitry employing one or more inductors having an unconventional turn-ratio. The circuitry includes a primary inductor having a first length located on a first layer of an integrated circuit (IC). The circuitry further includes a secondary inductor having a second length located on a second layer of the IC different from the first layer, whereby the second length is greater than the first length, with a ratio between the first and the second lengths corresponding to a non-integer turn-ratio.

Abstract: Disclosed are embodiments of an integrated circuit (IC) chip that includes an on-chip parameter generation system. The system includes multiple parameter generators (e.g., voltage generators, current generators, capacitance generators, etc.) and an integrated calibration circuit. The calibration circuit is configured to automatically, sequentially, and repeatedly calibrate the parameter generators in order to minimize chip-to-chip variations in parameters supplied to other on-chip components under real world operating conditions throughout the life of the IC chip. In other words, the integrated calibration circuit effectively minimizes temperature-induced chip-to-chip variations, age-induced chip-to-chip variations, etc. in parameters generated by the on-chip parameter generators. Also disclosed herein are embodiments of an associated method.

Abstract: Disclosed is a processing unit for computing a convolution of an activations matrix (e.g., a N×N activations matrix) and a weights kernel (e.g., a M×M weights kernel). The processing unit specifically employs an array of processing elements and a hardware-implemented spiral algorithm to compute the convolution. Due to this spiral algorithm, the need for a discrete data setup logic block is avoided, activation values from the activations matrix can be pre-loaded into processing elements only one time so that the need to repeatedly access the activations matrix is avoided, and the computation can be completed in a relatively low number of clock cycles, which is independent of the number of activation values in the activation matrix and which is equal to the number of weight values in a weights kernel. Also disclosed is an associated processing method.

Abstract: Disclosed is a row address comparator with voltage level shifting and latching functionality and including: an evaluation section for comparing two row addresses in a first voltage domain and outputting an initial match signal in a second voltage domain; and a latch section for outputting a latched final match signal based on the initial match signal. The comparator employs a first clock signal (CLK1), a second clock signal (CLK2) that is different from CLK1 and a third clock signal (CLK3) that is inverted with respect to CLK2. CLKs 1 and 2 control pre-charge and evaluation operations within the evaluation section with CLK2 being set to minimize hold time. CLKs 2 and 3 control the latch operation within the latch section. Feedback loops in both sections enhance performance. Also disclosed are a control circuit that incorporates the comparator and a method for implementing row redundancy in a memory.

Abstract: Methods and apparatus for combining received uplink transmissions. In an embodiment, a method is provided that includes receiving a descrambled resource element associated with selected second channel state information (CSI2) and receiving a descrambling sequence used to generate the descrambled RE. The method also includes rescrambling the descrambled RE using the descrambling sequence to generate a rescrambled RE and modifying the descrambling sequence to generate a modified descrambling sequence. The method also includes descrambling the rescrambled RE with the modified descrambling sequence to generate a modified descrambled RE and accumulating the modified descrambled RE to form a combined CSI2 value.

Abstract: Digital serializer/deserializer circuitry includes a data path and a date eye monitoring path. The data path includes a first analog-to-digital converter (ADC) to sample incoming data at a first rate, first digital filter circuitry to filter output of the first ADC, and a data slicer coupled to output of the first digital filter circuitry to output data above a threshold. The monitoring path includes a second ADC to sample the incoming data at a second rate lower than the first rate and to take samples at varying points along the incoming data waveform, second digital filter circuitry to filter output of the second ADC, and another data slicer coupled to output of the second digital filter circuitry to output data above an adjustable threshold and to sweep through varying threshold values. Error rate circuitry compares outputs of the data slicers to determine a data eye error rate.

Abstract: Disclosed is a multi-chip module (MCM) with redundant chip-to-chip communication connection(s) to minimize the need to discard a chip-mounting layer due to defective signal traces. The MCM includes at least first and second chips mounted on the chip-mounting layer. The chip-mounting layer includes signal traces that are electrically connected between first and second links on the first and second chips, respectively, to form communication connections including at least one redundant communication connection. Instead of being directly connected to the chip-to-chip communication connections, first and second interfaces on the first and second chips are connected via first and second multiplexors, respectively, to selected ones of multiple chip-to-chip communication connections. By employing the multiplexors and the redundant chip-to-chip communication connection(s), chip-to-chip communication connection(s) with defective signal trace(s) can be bypassed.

Abstract: A first communication device receives respective beamforming training data units simultaneously transmitted to the first communication device by multiple second communication devices. The first communication device generates, based on the respective beamforming training data units received from the multiple second communication devices, respective beamforming feedback data units to be transmitted to respective ones of the multiple second communication devices. The first communication device transmits the respective feedback data units to the respective ones of the multiple second communication devices.

Abstract: In a method for generating a data unit conforming to a first communication protocol, a first field and a second field to be included in a preamble of the data unit are generated. The first field includes a first set of one or more information bits that indicate a duration of the data unit and is formatted such that the first field allows a receiver device that conforms to a second communication protocol to determine the duration of the data unit. The second field includes a second set of one or more information bits that indicate to a receiver device that conforms to the first communication protocol that the data unit conforms to the first communication protocol. The first field and the second field are modulated using a modulation scheme specified for a field corresponding to the first field and the second field, respectively, by the second communication protocol.

Abstract: A packet type corresponding to a packet received by a network device is determined. Based on the packet type, one or more header fields to be extracted from a header of the packet are identified. Identifying the one or more header fields includes extracting, from a memory based on the packet type, respective indicators of locations of the one or more header fields and respective indicators of sizes of the one or more header fields. The one or more identified header fields from the header of the packet, based on the respective indicators of locations of the one or more header fields and respective indicators of sizes of the one or more header fields. The packet is then processed based on the one or more header fields extracted from the header. The processing includes deter mining at least one port to which to forward the packet.

Abstract: In a range measurement signal exchange session between a first communication device and a second communication device, the first communication device generates an NDP, which includes: generating a plurality of training fields to be used by the second communication device to determine a time of arrival of the NDP. Each training field corresponds to a respective orthogonal frequency divisional multiplexing (OFDM) symbol. Generating the plurality of training fields includes: i) setting signal samples corresponding to guard intervals between the OFDM symbols to zero, and ii) for each OFDM symbol, setting a plurality of frequency domain values corresponding to OFDM sub carriers of the OFDM symbol to complex number values. The first communication device transmits the NDP as part of the range measurement signal exchange session.

Abstract: A communication device of a client uplink group transmits an enhanced request to send (E-RTS) message to an access point of a wireless local area network, wherein the E-RTS message includes i) a length of a TXOP of the communication device and ii) an indication of a data unit size for an uplink MU-MIMO data unit to be transmitted by the communication device simultaneously with transmissions of other members of the client uplink group. The communication device receives a communication frame from the access point, the communication frame including a prompt to transmit an uplink MU-MIMO data unit having the indicated data unit size. The communication device generates the uplink MU-MIMO data unit having the indicated data unit size, and transmits, in response to the communication frame, the uplink MU-MIMO data unit to the access point during the TXOP simultaneously with transmissions of other members of the client uplink group.

Abstract: Disclosed is a multi-port memory array configured to minimize resistance-capacitance (RC) delay caused by wordline coupling. In each row of the array, a first voltage boost circuit is connected to the distal ends of a first wordline and a second wordline and boosts a first voltage on the first wordline during an access period when the first voltage is transitioning from low to high and when, concurrently, a second voltage on the second wordline is either low or transitioning to low. Optionally, a second voltage boost circuit is also connected to the distal ends of the first and second wordlines and boosts the second voltage on the second wordline during a different access period when the second voltage is transitioning from low to high and when, concurrently, the first voltage on the first wordline is either at low or transitioning from high to low. Also disclosed is a corresponding method.

Abstract: Embodiments described herein provide a method for transmitting a wake-up radio signal to low power devices in a wireless local area network. Data for transmission to a wireless device is received at a wireless access point, and a wake-up radio packet is generated. The wake-up signal includes a first preamble, a second preamble, and payload data including a wake-up user identifier assigned to the wireless device. The wake-up radio packet is encoded into an encoded wake-up radio frame including a plurality of encoded data symbols representing modulated payload data. The encoded wake-up radio frame is modulated onto a modulated waveform for transmission. A signal corresponding to the modulated waveform is transmitted to the wireless device.

Abstract: Disclosed is a parallel prefix adder structure with a carry bit generation circuit that generates primary carry bits for only some bit pairs and a sum circuit with ripple carry adders that use these primary carry bits to generate secondary carry bits and sum bits for a final sum. The carry bit generation circuit has different sections, which process different sequential sets of bit pairs and which have different sparsity configurations. As a result, generation of the primary carry bits is non-uniform. That is, in the different sections the primary carry bits are generated at different carry bit-to-bit pair ratios (e.g., the carry bit-to-bit pair ratios for the different sections can be 1:2, 1:4, and 1:2, respectively). For optimal performance, the specific bit pairs for which these primary carry bits are generated varies depending upon whether the maximum operand size is an odd number of bits or an even number.

Abstract: The present disclosure relates to a structure which includes a voltage level shifter circuit which includes a first current mirror leg circuit and a second current mirror leg circuit, the first current mirror leg circuit receives an input signal on a low voltage power supply and level shifts the input signal to a high voltage power supply which is at a greater voltage than the low voltage power supply, and the high voltage power supply is output from the second current mirror leg circuit.

Abstract: A semiconductor device comprises a first conductive material, a contact, an a magnetic tunneling junction positioned between the first conductive material and the contact. The semiconductor device further comprises a spacer that is positioned between the first conductive material and the contact and surrounds at least a portion of the magnetic tunneling junction. The spacer comprises spacer material that has at least some etch selectivity compared to a dielectric material that surrounds at least a portion of the first conductive material.

Abstract: The present disclosure relates to a structure which includes a merged write driver circuit with a first device next to a first memory array and a second device next to a second memory array, and the merged write driver circuit being configured to share a write driver line between the first device and the second device.

Abstract: A first communication device generates and transmits a wakeup packet configured to cause a wakeup radio of a second communication device to prompt a wireless local area network (WLAN) network interface device of the second communication device to transition from a low power state to an active state. The wakeup packet is generated to include i) a WLAN legacy preamble, ii) a wakeup radio (WUR) preamble, and iii) a data portion. The data portion comprises a plurality of time segments, each time segment corresponds to a respective information bit. The data portion is generated to include a respective prefix inserted prior to each time segment corresponding to the respective bit to mitigate intersymbol interference at a receiver caused at least by multipath effects.

Abstract: A method for deallocating memory in a first network device is described. A multicast packet is received and stored in memory cells. Egress descriptors corresponding to the multicast packet are generated for transmission of the multicast packet. A final count of the egress descriptors is determined. The egress descriptors are processed for transmission of the multicast packet and a value of a signed reference counter corresponding to the multicast packet is updated in a first direction before the final count has been determined and after a copy of the multicast packet has been received by an egress port of the first network device. The value of the signed reference counter is updated in a second direction opposite the first direction by the final count after determination of the final count. The memory cells are deallocated when cumulative first direction updates are equal to the second direction update.