Abstract: In a cascade amplifier, the collector of a first transistor with a grounded emitter and the emitter of a second transistor are connected. A third transistor has the base grounded at radio frequency, the emitter connected to the base of the first transistor, and the collector connected to the collector of the second transistor. A fourth transistor connected to the emitter of the third transistor works as a constant current source. A bias changeover circuit supplies base biases of these transisiors. In this constitution, by using the bias changeover circuit for changing over the bias depending on the cut-off condition of the first transistor, the gain is changed over by making either the cascade amplifier or the third transistor operate.
Type:
Grant
Filed:
January 19, 2000
Date of Patent:
December 18, 2001
Assignee:
Matsushita Electric Industria, Co., Ltd.
Abstract: A semiconductor integrated circuit is provided in which a negative voltage generation circuit capable of supplying a memory cell transistor substrate with a stable negative voltage, independently of the fluctuation of a power source voltage or environmental conditions and the process conditions etc., is realized easily, and in which the data holding time of a memory can be secured sufficiently, and the power consumption is reduced.
Type:
Application
Filed:
May 10, 2001
Publication date:
November 29, 2001
Applicant:
Matsushita Electric Industria Co., Ltd.