Abstract: Various buck-boost amplifier architectures are disclosed. In some architectures, a plurality of amplifiers use one or more inductors from a shared bank of inductors as needed to deliver variable amounts of power to respective loads. In some architectures, each amplifier includes multiple inductors and switches that are controlled to vary the number of inductors used in an amplifier based on a power requirement of the amplifier to drive its load. In some architectures, the switches include well switching devices. In some architectures, each amplifier drives multiple loads and is operated in a single inductor multiple output (SIMO) mode. In all architectures, the loads include speakers, piezo elements, and motors.

Abstract: A differential signal transfer system includes a dynamic level-shifter and a common-mode rejection device. The dynamic level-shifter is configured to (a) receive an input signal including a differential-mode component and a first common-mode component and (b) generate a level-shifted signal from the input signal, the level-shifted signal including the differential-mode component and a second common-mode component that is different from the first common-mode component. The common-mode rejection device is configured to receive the level-shifted signal and generate an output signal therefrom, where the output signal includes the differential-mode component.

Abstract: The invention relates to methods of interleaving payload data and integrity control data in an external memory interfaced with a microcontroller to improve data integrity check, enhance data confidentiality and save internal memory. Data words are received for storing in the external memory. Each data word is used to generate a respective integrity word, while an associated logic address is translated to two physical addresses in the external memory, one for the data word and the other for the integrity word. The two physical addresses for the data and integrity words are interleaved in the external memory, and sometimes, in a periodic scheme. In particular, each data word may be associated to an integrity sub-word included in an integrity word having the same length with that of a data word. The external memory may have dedicated regions for the data words and the integrity words, respectively.

Abstract: Systems and methods of the present invention allow to determine ambient gas temperature in harsh environments such as in a steam autoclave chamber during a sterilization process. In certain embodiments of the invention, temperature data is gathered using a sensor that is placed in an enclosed electronics-based temperature logging device. A capsule seals the temperature logging device except for a through hole that, during regular operation, allows gas to directly contact a surface of the temperature logging device in order to reduce a time lag between the data logging device and an ambient gas. As a result, the data logging device accurately can track temperature variations when placed, for example, inside a chamber.

Abstract: A method for communicating an event occurrence among a plurality of photovoltaic assemblies of a photovoltaic system includes the following steps: (1) in response to the event occurrence, injecting a first signal onto a power line at a first photovoltaic assembly of the plurality of photovoltaic assemblies, (2) detecting the first signal on the power line at a second photovoltaic assembly of the plurality of photovoltaic assemblies, and (3) in response to detecting the first signal on the power line at the second photovoltaic assembly, injecting a second signal onto the power line at the second photovoltaic assembly.

Abstract: A multipoint communication system for a battery management system includes a distributed antenna at least partially disposed within a battery pack, a plurality of nodes, each node being wirelessly coupled to the distributed antenna and configured to acquire battery information, and a radio frequency gateway electrically coupled to the distributed antenna.

Abstract: Systems and methods allow to take advantage of the natural statistical variation of physical properties in a semiconductor device in order to create truly random, repeatable, and hard to detect cryptographic bits. This may be accomplished by recursively pairing mismatch values of Physically Unclonable Functions (PUF) elements so as to ensure that generated PUF key bits remain insensitive to environmental errors, without affecting the utilization rate of available PUF elements. The pairing process may be applied to any given hardware to generate more stable PUF bit sequences that provide a higher margin of error, increase the number of bits for a given margin of error, or any combination thereof.

Abstract: Presented are systems and methods that allow hardware designers to protect valuable IP and information in the hardware domain in order to increase overall system security. In various embodiments of the invention this is accomplished by configuring logic gates of existing logic circuitry based on a key input. In certain embodiments, a logic function provides results that are dependent not only on input values but also on an encrypted logic key that determines connections for a given logic building block, such that the functionality of the logic function cannot be determined by reverse engineering. In some embodiments, the logic key is created by decrypting a piece of data using a secret or private key. Advantages of automatic encryption include that existing circuitry need not be re-implemented or re-built, and that the systems and methods presented are backward compatible with standard manufacturing tools.

Abstract: Various embodiments of the invention implement countermeasures designed to withstand attacks by potential intruders who seek partial or full retrieval of elliptic curve secrets by using Various embodiments of the invention implement countermeasures designed to withstand attacks by potential intruders who seek partial or full retrieval of elliptic curve secrets by using known methods that exploit system vulnerabilities, including elliptic operation differentiation, dummy operation detection, lattice attacks, and first real operation detection. Various embodiments of the invention provide resistance against side-channel attacks, such as simple power analysis, caused by the detectability of scalar values from information leaked during regular operation flow that would otherwise compromise system security. In certain embodiments, system immunity is maintained by performing elliptic scalar operations that use secret-independent operation flow in a secure Elliptic Curve Cryptosystem.

Abstract: Described herein are systems and methods that manage polarization in coherent optical receivers by using analog signal processing that eliminates the need for ultra-fast, power-hungry ADCs and DSPs and that would require digitization of the full-bandwidth signal path and result in bulky and expensive circuit designs. Various embodiments of the invention provide polarization correction by using an analog polarization correction circuit that implements the equivalent of two matrix operations. This is accomplished by using analog electronics that comprises a combination of variable and unity gain amplifiers to align polarizations of input signals to generate a polarization-corrected output signal that is further aligned with the polarization frame of reference of the receiver.

Abstract: A multi-level switching power converter includes a string of N upper transistors and a string of N lower transistors, where N is an integer greater than one. The N upper transistors are electrically coupled in series between a first power node and a switching node, and the N lower transistors are electrically coupled in series between the switching node and a reference node. The multi-level switching power converter further includes N?1 flying capacitors, an inductor, a bypass transistor, and a controller. The bypass transistor is electrically coupled between the switching node and the reference node. The controller is configured to (a) control switching of the N upper transistors and the N lower transistors and (b) cause the bypass transistor to operate in its on state in response to all of the N lower transistors operating in their respective on states.

Abstract: A method for charging a battery includes (a) applying a charging current pulse to the battery, (b) after the step of applying the charging current pulse to the battery, measuring a first voltage across the battery, (c) estimating an equilibrium voltage of the battery, (d) determining a Nernst voltage of the battery from a difference between the first voltage and the equilibrium voltage, and (e) controlling charging of the battery at least partially based on the Nernst voltage.

Abstract: An electronic device comprising a matched filter to drive a LED module is disclosed. The matched filter receives an incoming rectangular pulse and outputs a modulated driving signal to drive the LED module. The optical output from the LED is captured by an optical sensor and converted to electrical signal for analysis. A decimation filter couples to the optical sensor in an effort of reducing sampling rate and quantization noise of the converted electrical signal. The modulated driving signal output from the matched filter keeps the LED current, thus LED light, matching the time-mirrored impulse response of the decimation filter to obtain or approach a theoretical maximum signal-to-noise (SNR) at a fixed amount of power.

Abstract: A multiphase DC-DC converter includes a coupled inductor, N phases of the multiphase DC-DC converter, and a controller, where N is an integer greater than 2. The coupled inductor includes a plurality of inductors. Each inductor is coupled to two neighboring inductors or to rest of the inductors. The N phases of the multiphase DC-DC converter are respectively connected to the plurality of inductors. The controller operates the multiphase DC-DC converter in continuous conduction mode and in discontinuous conduction mode. Body diodes of switches in the N phases do not conduct when the multiphase DC-DC converter operates in discontinuous conduction mode.

Abstract: An optical sensor packaging system and method can include: providing an embedded substrate, the embedded substrate including an embedded chip coupled to a redistribution pad with a redistribution line connecting therebetween; mounting an optical sensor to the embedded substrate, the optical sensor including a photo sensitive material formed on a photo sensitive area of an active optical side of the optical sensor; wire-bonding the optical sensor to the embedded substrate with a first bond wire connected from the active optical side to the redistribution pad; and encapsulating the optical sensor, the first bond wire, and the photo sensitive material with an over-mold, the over-mold formed with a top surface co-planar to a surface of the photo sensitive material, the over-mold forming a vertically extended boarder around the photo sensitive material and around the optical sensing area, and the over-mold formed above the first bond wire.

Abstract: A current sense device includes a reference transistor for electrically coupling to a power transistor, a sense transistor for electrically coupling to the power transistor, and control circuitry. The control circuitry is configured to (a) control current through the sense transistor such that a voltage at the sense transistor has a predetermined relationship to a voltage at the power transistor, and (b) control current through the sense transistor according to one or more operating conditions at the reference transistor, to compensate for aging of the power transistor.

Abstract: Analog signal processing systems and methods manage polarization in coherent optical receivers to eliminate the need for ultra-fast, power-hungry ADCs and DSPs and that require digitization of the full-bandwidth signal path and result in bulky and expensive circuit designs. Various embodiments an analog polarization correction circuit that implements the equivalent of two matrix operations by combining variable and unity gain amplifiers to align polarizations of input signals to generate a polarization-corrected output signal that is aligned with the polarization frame of reference of a receiver. Various embodiments use BSS to perform polarization control, including electro-optical polarization control, in a feedback loop and operate without the need for a pilot tone or a startup sequence when deducing the polarization state.

Abstract: A logic level shifter interface including a string of logic components communicating between a first power domain and a second power domain; a first string of resistive components connecting a first power rail of the first power domain to a first power rail of the second power domain and having a plurality of intermediate first power rails at nodes between adjacent resistive components of the first string of resistive components; and a second string of resistive components connecting a second power rail of the first power domain to a second power rail of the second power domain and having a plurality of intermediate second power rails at nodes between adjacent resistive components of the second string of resistive components, where at least one logic component is powered by an intermediate first power rail of the first string of resistive components and an intermediate second power rail of the second string of resistive components.

Abstract: Various embodiments of the present invention relates generally to an integrated circuit, and more particularly, to systems, devices and methods of incorporating a tamper detection countermeasure into a security ASIC to deter physical attacks. The tamper detection countermeasure architects an active mesh to cover a sensitive area in the security ASIC. A plurality of time-varying random numbers is generated by a random number generator (RNG), and the active mesh is driven and configured according to these random numbers. During tamper detection cycles, the active mesh is monitored with respect to the plurality of random numbers that is directly provided by the RNG. Upon a tampering attempt, a flag signal is generated and used to initialize subsequent anti-tampering actions. The active mesh may be controlled and monitored based on time-varying codes, and therefore, an adversary may not easily bypass the active mesh and attack the sensitive area.

Abstract: Various embodiments of the invention implement countermeasures designed to withstand attacks by potential intruders who seek partial or full retrieval of elliptic curve secrets by using known methods that exploit system vulnerabilities, including elliptic operation differentiation, dummy operation detection, lattice attacks, and first real operation detection. Various embodiments of the invention provide resistance against side-channel attacks, such as sample power analysis, caused by the detectability of scalar values from information leaked during regular operation flow that would otherwise compromise system security. In certain embodiments, system immunity is maintained by performing elliptic scalar operations that use secret-independent operation flow in a secure Elliptic Curve Cryptosystem.