Abstract: A lead frame and a semiconductor package including the lead frame are provided. The lead frame includes: a base material; a first metal layer which is formed on at least one side of the base material, of which a surface is roughly formed, and which includes copper or nickel; a second metal layer which is formed on a surface of the first metal layer, of which a surface is roughly formed, and which includes palladium or a palladium alloy; a third metal layer which is formed on a surface of the second metal layer, of which a surface is roughly formed, and which includes gold or a gold alloy; and a fourth metal layer which is formed on a surface of the third metal layer, of which a surface is roughly formed, and which includes metal that includes silver.

Abstract: The present invention provides a lead frame having excellent solder wettability and solderability, that is well-bonded to a copper wire, and manufactured with low cost, and a semiconductor package manufactured by using the same. The lead frame includes: a base material; a first metal layer formed on at least one surface of the base material, the first metal layer comprising nickel; a second metal layer formed on a surface of the first metal layer, the second metal layer comprising palladium; and a third metal layer formed on a surface of the second metal layer, the third metal layer comprising silver.

Abstract: A method of manufacturing a lead frame for a light-emitting device package and a light-emitting device package are provided. The method of manufacturing a lead frame for a light-emitting device package includes: preparing a base substrate for the lead frame; forming diffusion roughness on the base substrate; and forming a reflective plating layer on the diffusion roughness formed base substrate.

Abstract: Provided is a method of manufacturing a circuit which includes: (a) providing a substrate made of a conductive material; (b) etching a first surface of the substrate excluding a region in which at least one via is to be formed; (c) etching a region of the etched first surface of the substrate in which an insulated portion of a first circuit is to be formed; (d) stacking a first insulation layer in spaces formed by the etching performed in operations (b) and (c); and (e) grinding a second surface of the substrate to expose the first insulation layer outward along with the first circuit, thereby forming a circuit board.