Abstract: A method for rendering an MPEG sequence includes decoding a first picture in the MPEG sequence; reducing a data size of the decoded first picture by quantizing at least one component of the first picture, the quantized component selected from the luminance and chrominance components of the first picture; storing a reduced data size representation of the decoded first picture to a memory; reading a prediction block of the reduced data size representation of the decoded first picture; inverse quantizing the selected component of the prediction block of the reduced data size representation of the decoded first picture to restore the prediction block of the decoded first picture; and decoding a block of a second picture in the sequence according to the restored prediction block of the decoded first picture.

Abstract: A method for decoding a digital video sequence includes decoding a first picture in the sequence; reducing a data size of the decoded first picture by vector quantizing at least one component of the first picture, the quantized component selected from the luminance and chrominance components of the first picture; storing a reduced data size representation of the decoded first picture to a memory; reading a region of interest of the reduced data size representation of the decoded first picture; and decoding a region of interest of a second picture in the sequence according to the region of interest of the reduced data size representation of the decoded first picture.

Abstract: An apparatus for frequency synchronization is proposed to detect a synchronization signal from the baseband signals. It is featured that three types of detection values are introduced to detect whether the synchronization signal is received or not. More particularly, the claimed frequency synchronization apparatus provides at least one signal power generator for receiving a predetermined number of symbols of the baseband signals, and further calculating an average quality value therefore. Further, the apparatus includes a signal selector for producing a first detection value according to the average quality value. Still further, the apparatus provides a decision unit to produce a second detection value. After that, a signal processor inside the decision unit is used to calculate a third detection value as combining the first detection value and the second detection.

Abstract: An address-accessing device includes first and second information generators for producing first and second information according to the received address signals; a phase offset detector for producing a phase offset according to the first and second information; a reference signal generator for producing a reference signal according to the phase offset, the first information and the second information; and a decoder used to determine the structure type of an address-in-pregroove unit (ADIP) according to the reference value. This address-accessing device is capable of adjusting the decision level and the phase offset automatically to lower the error rate occurring in the address access procedure.

Abstract: An apparatus for maximum likelihood signal detection comprises a reference data unit, a branch metric unit, an add-compare-select unit, a path metric unit and a path memory, and is used for detecting maximum likelihood signal. The reference information unit, the branch metric unit, the add-compare-select unit or the path metric unit can further comprise a multiplexer to removing unnecessary paths according to a control signal. The control signal is adjusted according to channel response, coding constraint or channel memory length.

Abstract: A handoff method. A mobile station calculates and records the strength of a pilot signal from a cell as reference strength if a handoff occurs in a first system. The mobile station further adjusts the reference strength according to the effect caused by forward and reverse links between a base station and the mobile station, and performs a handoff between the first and a second system if the strength of the pilot signal reaches the reference strength.

Abstract: An address-accessing device includes first and second information generators for producing first and second information according to the received address signals; a phase offset detector for producing a phase offset according to the first and second information; a reference signal generator for producing a reference signal according to the phase offset, the first information and the second information; and a decoder used to determine the structure type of an address-in-pregroove unit (ADIP) according to the reference value. This address-accessing device is capable of adjusting the decision level and the phase offset automatically to lower the error rate occurring in the address access procedure.

Abstract: A method of rate control in a video encoder includes performing a first encoding step to encode macroblocks of a current frame by utilizing a first quantization parameter to thereby generate a residual signal for the current frame; estimating a number of header bits for each macroblock mode to thereby estimate a total number of header bits for the current frame; estimating an available number of texture bits according to the total number of header bits for the current frame; determining a second quantization parameter according to the estimated available number of texture bits; and performing a second encoding step to encode the residual signal for the current frame by utilizing the second quantization parameter.

Abstract: A multi-queue single-FIFO scheme for quality of service oriented communication. According to the invention, an arbiter maintains a number of next access pointers for multiple queues storing data packets to be transmitted. The arbiter also determines which queue is to be serviced next contingent upon a quality of service policy and then fetches at least one data packet, identified by the chosen queue's next access pointer, through a peripheral bus by means of direct memory access (DMA). A single FIFO buffer is connected to the arbiter to store and manage the fetched data packet in a first-in-first-out manner. Following the FIFO buffer, physical layer interface logic accepts each data packet, if available, and prepares the data packet for transmission on a physical medium.

Abstract: An apparatus for maximum likelihood signal detection comprises a reference data unit, a branch metric unit, an add-compare-select unit, a path metric unit and a path memory, and is used for detecting maximum likelihood signal. The reference information unit, the branch metric unit, the add-compare-select unit or the path metric unit can further comprise a multiplexer to removing unnecessary paths according to a control signal. The control signal is adjusted according to channel response, coding constraint or channel memory length.

Abstract: For maintaining the regular operating current in an inner circuit under electrostatic discharge (ESD) event, an ESD protection device is provided to control an ESD path switch in the turned-on condition by employing a MOS device and a latch-detected turned-on circuit. The MOS device has a self-aligned silicidation (Salicide) therein. The ESD protection device is used to stabilize operation efficiency and reduce the area of an ESD protection device without a silicide block disposed therein for enhancing the ESD protection capability.

Abstract: An apparatus for controlling discrete data in a disk overwrite area or a power calibration area comprises a signal-processing unit, an address-processing unit, a control signal-processing unit, a clock recovery circuit, a signal-processing unit parameter control unit, and a clock recovery circuit parameter control unit, wherein the control signal-processing unit uses a message produced by a data on the disc to determine the control signals such as hold, load, or increasing bandwidth for holding, loading, and increasing the bandwidth of the parameters for processing the related circuits (such as the circuit of the signal-processing unit or the clock recovery circuit) of the discrete data produced between the two data clusters, so as to increase the convergent speed of the circuits for assuring the accuracy of reading data.

Abstract: A path metric computing method applied in a high-speed Viterbi detector and related apparatus thereof are disclosed. The path metric computing apparatus includes a comparator for generating a control signal according a plurality of previous path metrics, a combining circuit for generating a plurality of first output values according to the previous path metrics and branch costs of a plurality of branches of a current state, and a multiplexer, electrically connected to the comparator and the combining circuit, for determining a first path metric of the current state according to the control signal and the output values.

Abstract: An apparatus for writing data to an optical storage media and a servo control unit and a laser diode driver unit thereof. The apparatus making a laser diode emit light includes a servo control unit and a laser diode driver unit. The servo control unit includes a control unit for controlling a burning procedure and a modulation unit for outputting an encoded signal. The laser diode driver unit receives the encoded signal and includes a PLL unit, a write strategy generation unit and a lock/unlock detection unit. The PLL unit outputs at least one of a second clock signal and a second data signal according to the encoded signal. The write strategy generation unit outputs a control signal to control the laser diode according to the second clock signal and the second data signal. The lock/unlock detection unit outputs a lock indicator or an unlock indicator to the control unit.

Abstract: A method for controlling the recording speed of a multi-layered optical disc divides a multi-layered optical disc into a plurality of zones with each zone having a corresponding recording speed. It is then determined which zones need the recording speed to be reduced according to the quality of the optical disc. When the optical drive records data onto an inferior quality zone, it reduces the recording speed to guarantee the reliability of recorded data and enhance recording quality. When the optical drive records data on the next recording layer and has passed the zone that corresponds to the inferior quality zone of the previous recording layer, it increases the recording speed. Thereby the method ensures both quality and efficiency. Furthermore, the recording speed of each subsequent zone of the next recording layer corresponds to the recording speed of each previous zone of the recording layer.

Abstract: A method for tuning a plurality of write strategy parameters of an optical storage device includes detecting a plurality of lengths, each length corresponding to a pit or a land on an optical storage medium accessed by the optical storage device, performing calculations corresponding to a plurality of data set types and generating a plurality of data-to-clock edge deviations respectively corresponding to the data set types, and utilizing the data-to-clock edge deviations for tuning the write strategy parameters corresponding to the data set types respectively.

Abstract: An apparatus performs burst noise detection and then reduce the interference of the burst noise by controlling an operation of an adaptive apparatus, such as an equalizer. It includes: an adaptive apparatus having multiple coefficients, processing incoming signals according to these coefficients, and employing an error estimator to update the coefficients; a burst noise detector used to detect a burst noise; and an ON/OFF switching unit used to stop the error estimator from updating the coefficients when the burst noise is detected.

Abstract: A recording apparatus for optical data includes a photo detection IC for producing a plurality of phase signals; a plurality of sample/hold (S/H) circuits electrically connected to the photo detection IC; a plurality of limiter circuits electrically connected to the photo detection IC; a channel signal generator connected to the S/H circuits; and a level shift circuit connected to an output of the channel signal generator. The recording apparatus for optical data prevents the interference of servo signal during high speed operation and ensures normal operation of S/H circuits thereof.

Abstract: The invention relates to a transmission diversity detecting apparatus and method. The transmission diversity detecting apparatus is applied in a Wideband Code-Division Multiple-Access (WCDMA) system having a CIPCH channel and a synchronization channel for detecting an antenna diversity of a cell. The transmission diversity detecting apparatus includes an antenna diversity detecting unit for determining the antenna diversity; and a quality indicator generator, electrically connected to the antenna diversity detecting unit, for generating a quality indicator utilized for indicating the reliability of the antenna diversity determined by the antenna diversity detecting unit.

Abstract: An apparatus for error-correcting an input signal to generate an output signal. The apparatus includes an unreliable-location determining module for determining unreliable-locations of the input signal and generating an indication signal accordingly, a first error-correcting module for error-correcting the input signal to generate a first candidate signal, a second error-correcting module coupled to the unreliable-location determining module for error-correcting the input signal with reference to the indication signal to generate a second candidate signal, and a selecting module coupled to the first and second error-correcting modules for selecting one of the first and second candidate signals to be the output signal.