Patents Assigned to Micromaterials, LLC
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Patent number: 10720341Abstract: A high-pressure processing system for processing a layer on a substrate includes a first chamber, a support to hold the substrate in the first chamber, a second chamber adjacent the first chamber, a foreline to remove gas from the second chamber, a vacuum processing system configured to lower a pressure within the second chamber to near vacuum, a valve assembly between the first chamber and the second chamber to isolate the pressure within the first chamber from the pressure within the second chamber, a gas delivery system configured to increase the pressure within the first chamber to at least 10 atmospheres while the first chamber is isolated from the second chamber, an exhaust system comprising an exhaust line to remove gas from the first chamber, and a common housing surrounding both the first gas delivery module and the second gas delivery module.Type: GrantFiled: November 7, 2018Date of Patent: July 21, 2020Assignee: Micromaterials, LLCInventors: Qiwei Liang, Srinivas D. Nemani, Sean S. Kang, Adib Khan, Ellie Y. Yieh
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Patent number: 10699953Abstract: Apparatuses and methods to provide a fully self-aligned via are described. Some embodiments of the disclosure provide an electronic device having a liner that is selectively removable when compared to conductive lines. The liner may be selectively removed by utilizing one or more of a base (e.g. sodium hydroxide) and hydrogen peroxide.Type: GrantFiled: May 29, 2019Date of Patent: June 30, 2020Assignee: Micromaterials LLCInventors: Amrita B. Mullick, Nitin K. Ingle, Xikun Wang, Regina Freed, Uday Mitra, Ho-yung David Hwang
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Patent number: 10692728Abstract: Methods of forming and processing semiconductor devices which utilize the selective etching of aluminum oxide over silicon oxide and/or silicon nitride are described. Certain embodiments relate to the formation of fin-etched substrates. Other embodiments relate to the removal of source drain caps from substrates. Further embodiments relate to the processing of substrates comprising vias and/or metal contacts with bottom etch stop layers and/or liner layers.Type: GrantFiled: September 27, 2018Date of Patent: June 23, 2020Assignee: MICROMATERIALS LLCInventors: Qingjun Zhou, Ying Zhang, Yung-Chen Lin
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Publication number: 20200168440Abstract: Processing methods may be performed to form semiconductor structures that may include three-dimensional memory structures. The methods may include forming a plasma of a fluorine-containing precursor in a remote plasma region of a processing chamber. The methods may include contacting a semiconductor substrate with effluents of the plasma. The semiconductor substrate may be housed in a processing region of the processing chamber. The methods may include selectively cleaning exposed nitride materials with the effluents of the plasma. The methods may also include subsequently depositing a cap material over the cleaned nitride material. The cap material may be selectively deposited on the nitride material relative to exposed regions of a dielectric material.Type: ApplicationFiled: January 30, 2020Publication date: May 28, 2020Applicant: Micromaterials LLCInventors: Sung Kwan Kang, Kyung-Ha Kim, Gill Lee
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Publication number: 20200098633Abstract: A first metallization layer comprising a set of first conductive lines that extend along a first direction on a first insulating layer on a substrate. A second insulating layer is on the first insulating layer. A second metallization layer comprises a set of second conductive lines on a third insulating layer and on the second insulating layer above the first metallization layer. The set of second conductive lines extend along a second direction that crosses the first direction at an angle. A via between the first metallization layer and the second metallization layer. The via is self-aligned along the second direction to one of the first conductive lines.Type: ApplicationFiled: November 22, 2019Publication date: March 26, 2020Applicant: Micromaterials LLCInventors: Ying Zhang, Abhijit Basu Mallick, Regina Freed, Nitin K. Ingle, Uday Mitra, Ho-yung David Hwang
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Patent number: 10600688Abstract: Methods and apparatus to form fully self-aligned vias are described. A seed gapfill layer is formed on a recessed first insulating layers positioned between first conductive lines. Pillars are formed from the seed gapfill layer and a second insulating layer is deposited in the gaps between pillars. The pillars are removed and a third insulating layer is deposited in the gaps in the second insulating layer to form an overburden of third insulating layer. A portion of the overburden of the third insulating layer is removed to expose the first conductive lines and form vias.Type: GrantFiled: August 29, 2018Date of Patent: March 24, 2020Assignee: Micromaterials LLCInventors: Ying Zhang, Regina Freed, Nitin K. Ingle, Ho-yung David Hwang, Uday Mitra
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Patent number: 10593594Abstract: Methods of forming a self-aligned via comprising recessing a first metallization layer comprising a set of first conductive lines that extend along a first direction on a first insulating layer on a substrate. A second insulating layer is formed on the first insulating layer. A via is formed through the second insulating layer to one of the first conductive lines. Semiconductor devices comprising the self-aligned via and apparatus for forming the self-aligned via are also disclosed.Type: GrantFiled: December 11, 2018Date of Patent: March 17, 2020Assignee: Micromaterials LLCInventors: Yung-Chen Lin, Qingjun Zhou, Ying Zhang, Ho-yung David Hwang, Uday Mitra, Regina Freed
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Patent number: 10573555Abstract: Methods and apparatus to form fully self-aligned vias are described. Portions of first conductive lines are recessed in a first insulating layer on a substrate. A first metal film is formed in the recessed portions of the first conductive lines and pillars are formed from the first metal film. A second insulating layer is deposited around the pillars. The pillars are removed to form vias in the second insulating layer. A third insulating layer is deposited in the vias and an overburden is formed on the second insulating layer. Portions of the overburden are selectively etched from the second insulating layer to expose the second insulating layer and the filled vias and leaving portions of the third insulating layer on the second insulating layer. The third insulating layer is etched from the filled vias to form a via opening to the first conductive line.Type: GrantFiled: August 29, 2018Date of Patent: February 25, 2020Assignee: Micromaterials LLCInventors: Ying Zhang, Regina Freed, Nitin K. Ingle, Ho-yung Hwang, Uday Mitra, Abhijit Basu Mallick
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Patent number: 10553485Abstract: Methods and apparatus to form fully self-aligned vias are described. First conductive lines are recessed in a first insulating layer on a substrate. A first metal film is formed in the recessed first conductive lines and pillars are formed from the first metal film. Some of the pillars are selectively removed and a second insulating layer is deposited around the remaining pillar. The remaining pillars are removed to form vias in the second insulating layer. A third insulating layer is deposited in the vias and an overburden is formed on the second insulating layer. Portions of the overburden are selectively etched from the second insulating layer to expose the second insulating layer and the filled vias and leaving portions of the third insulating layer on the second insulating layer. The third insulating layer is etched from the filled vias to form a via opening to the first conductive line.Type: GrantFiled: June 22, 2018Date of Patent: February 4, 2020Assignee: Micromaterials LLCInventors: Ying Zhang, Regina Freed, Nitin K. Ingle, Ho-yung Hwang, Uday Mitra, Abhijit Basu Mallick, Sanjay Natarajan
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Patent number: 10529603Abstract: A high-pressure processing system for processing a substrate includes a first chamber, a pedestal positioned within the first chamber to support the substrate, a second chamber adjacent the first chamber, a vacuum processing system configured to lower a pressure within the second chamber to near vacuum, a valve assembly between the first chamber and the second chamber to isolate the pressure within the first chamber from the pressure within the second chamber, and a gas delivery system configured to introduce a processing gas into the first chamber and to increase the pressure within the first chamber to at least 10 atmospheres while the processing gas is in the first chamber and while the first chamber is isolated from the second chamber.Type: GrantFiled: March 4, 2019Date of Patent: January 7, 2020Assignee: Micromaterials, LLCInventors: Qiwei Liang, Srinivas D. Nemani, Adib M. Khan, Venkata Ravishankar Kasibhotla, Sultan Malik, Sean Kang, Keith Tatseun Wong
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Patent number: 10522404Abstract: A first metallization layer comprising a set of first conductive lines that extend along a first direction on a first insulating layer on a substrate. A second insulating layer is on the first insulating layer. A second metallization layer comprises a set of second conductive lines on a third insulating layer and on the second insulating layer above the first metallization layer. The set of second conductive lines extend along a second direction that crosses the first direction at an angle. A via between the first metallization layer and the second metallization layer. The via is self-aligned along the second direction to one of the first conductive lines.Type: GrantFiled: July 24, 2019Date of Patent: December 31, 2019Assignee: Micromaterials LLCInventors: Ying Zhang, Abhijit Basu Mallick, Regina Freed, Nitin K. Ingle, Uday Mitra, Ho-yung Hwang
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Patent number: 10510540Abstract: Methods of forming semiconductor devices comprising etching a hardmask and spin-on-carbon layer through an opening in a photoresist to expose a gapfill material. The photoresist, spin-on-carbon layer and gapfill material are removed. A new spin-on-carbon layer, hardmask and photoresist are formed with an opening over a spacer mandrel. The hardmask, spin-on-carbon layer are etched through the opening and the layers and spacer mandrel are removed. An etch stop layer and oxide layer are removed and a height of the spacer mandrel and gapfill material are reduced exposing portions of the substrate. The exposed portions of the substrate are fin etched and the layers removed.Type: GrantFiled: July 12, 2018Date of Patent: December 17, 2019Assignee: MICROMATERIALS LLCInventors: Ying Zhang, Qingjun Zhou, Yung-Chen Lin, Ho-yung David Hwang
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Patent number: 10410921Abstract: A first metallization layer comprising a set of first conductive lines that extend along a first direction on a first insulating layer on a substrate. A second insulating layer is on the first insulating layer. A second metallization layer comprises a set of second conductive lines on a third insulating layer and on the second insulating layer above the first metallization layer. The set of second conductive lines extend along a second direction that crosses the first direction at an angle. A via between the first metallization layer and the second metallization layer. The via is self-aligned along the second direction to one of the first conductive lines.Type: GrantFiled: February 11, 2019Date of Patent: September 10, 2019Assignee: Micromaterials LLCInventors: Ying Zhang, Abhijit Basu Mallick, Regina Freed, Nitin K. Ingle, Uday Mitra, Ho-yung David Hwang
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Patent number: 10224224Abstract: A high-pressure processing system for processing a substrate includes a first chamber, a pedestal positioned within the first chamber to support the substrate, a second chamber adjacent the first chamber, a vacuum processing system configured to lower a pressure within the second chamber to near vacuum, a valve assembly between the first chamber and the second chamber to isolate the pressure within the first chamber from the pressure within the second chamber, and a gas delivery system configured to introduce a processing gas into the first chamber and to increase the pressure within the first chamber to at least 10 atmospheres while the processing gas is in the first chamber and while the first chamber is isolated from the second chamber.Type: GrantFiled: December 7, 2017Date of Patent: March 5, 2019Assignee: Micromaterials, LLCInventors: Qiwei Liang, Srinivas D. Nemani, Adib Khan, Venkata Ravishankar Kasibhotla, Sultan Malik, Sean S. Kang, Keith Tatseun Wong