Abstract: Systems and methods which provide a multimode tuner architecture implementing direct frequency conversion are shown. Embodiments provide a highly integrated configuration wherein low noise amplifier, tuner, analog and digital channel filter, and analog demodulator functionality are provided in a single integrated circuit. A LNA of embodiments implements a multi-path configuration with seamless switching to provide desired gain control while meeting noise and linearity design parameters. Embodiments of the invention implement in-phase and quadrature (IQ) equalization and a multimode channelization filter architecture to facilitate the use of direct frequency conversion. Embodiments implement spur avoidance techniques for improving tuner system operation and output using a clock signal generation architecture in which a system clock, sampling clock frequencies, local oscillator (LO) reference clock frequencies, and/or the like are dynamically movable.

Abstract: Systems and methods which provide a multimode tuner architecture implementing direct frequency conversion are shown. Embodiments provide a highly integrated configuration wherein low noise amplifier, tuner, analog and digital channel filter, and analog demodulator functionality are provided in a single integrated circuit. A LNA of embodiments implements a multi-path configuration with seamless switching to provide desired gain control while meeting noise and linearity design parameters. Embodiments of the invention implement in-phase and quadrature (IQ) equalization and a multimode channelization filter architecture to facilitate the use of direct frequency conversion. Embodiments implement spur avoidance techniques for improving tuner system operation and output using a clock signal generation architecture in which a system clock, sampling clock frequencies, local oscillator (LO) reference clock frequencies, and/or the like are dynamically movable.

Abstract: Systems and methods which place a spurious signal within a capture bandwidth of a tuner. Placement of the spur is preferably controlled to dispose the spur within a spur placement window, such as may be defined between traffic channels of an input signal. A tuner system operating in accordance with embodiments may be controlled to select a particular input frequency band comprising a plurality of traffic channels for frequency conversion and to determine local oscillator frequencies which result in most relevant spurs being placed outside of the tuner capture bandwidth. The local oscillator frequencies may be shifted to place a relevant spur remaining within the capture bandwidth of the tuner between traffic channels of the plurality of traffic channels. Embodiments operate to determine frequency offset between a transmitter and a tuner to determine the midpoint between channels.

Abstract: A method for generating phase signals includes triggering a phase register to output a binary number stored in the phase register, wherein the phase register is triggered based at least in part on a voltage signal provided by a voltage controlled oscillator. The method also includes providing an input signal to a decoder, wherein the input signal is based at least in part on the binary number output by the phase register and the decoder is operable to generate phase signals in response to the input signals. The method further includes incrementing the binary number stored in the phase register and repeating the triggering and providing steps after the binary number is incremented.

Abstract: A digital radio system comprises a mixer and an analog-to-digital converter communicative coupled to the mixer. The mixer generates an intermediate frequency signal based at least in part upon a radio frequency signal and a local oscillator signal, wherein the intermediate frequency signal comprises a signal of interest having a particular bandwidth. The analog-to-digital converter generates a digital signal by quantizing the intermediate frequency signal using a sampling frequency that is greater than twice the bandwidth of the signal of interest and less than the frequency of the intermediate frequency signal.

Abstract: A broadband integrated television receiver for receiving a standard antenna or cable input and outputting an analog composite video signal and composite audio signal is disclosed. The receiver employs an up-conversion mixer and a down-conversion mixer in series to produce an IF signal. An IF filter between the mixers performs coarse channel selection. The down-conversion mixer may be an image rejection mixer to provide additional filtering. The received RF television signals are converted to a standard 45.75 MHz IF signal for processing on-chip by additional circuitry.

Abstract: A broadband frequency synthesizer including a first local oscillator signal generated in a first phase locked loop. A second local oscillator signal is generated in a second phase locked loop. Third and fourth phase locked loops provide inputs to the second phase locked loop to control the second local oscillator frequency. The system and method provides for small step size tuning while maintaining wide phase lock loop bandwidth.

Abstract: The invention is a multiple mode transmission system that interconnects the computer of a user with the Internet. The system has a first link that is a relatively low bandwidth telephone system. The system also has a second link that is a relatively high bandwidth television system. The television link can be either terrestrial or cable. The user would send an information request to the Internet across the telephone system. The actual information would be sent to the user via the television system. Scheduling data that informs the user of the time, channel, and exact location of the information in the television signal is sent to the user across the telephone system. The scheduling data is used by the inventive system to program the TV tuner that is used by the computer to receive the TV signal. The information can be encrypted, and the key would be included with the scheduling data. The channels can be dedicated data channels.

Abstract: A high linearity transconductance stage is arranged with a loss cancellation method to remove the nonlinearity of a typical transconductance circuit. The loss cancellation method uses a series of transistors and resistors to supply a controlled feedback current to cancel the result of the change (.DELTA.) in voltage across the input of the transistor used to provide the transconductance for the transconductance stage of a circuit, such as an amplifier, a mixer or other active circuit.

Abstract: A highly linear variable-gain low noise amplifier is constructed using a transistor pair having variable gain control. The gain of the transistor pair is achieved by a segmented resistor having controllable PMOS (or NMOS) components. The circuit includes a variable voltage source and operates to handle wideband radio transmissions via broadcast or cable.

Abstract: An interference free local oscillator circuit is disclosed. A first local oscillator signal is generated in a first phase locked loop. A second local oscillator signal is generated in a second phase locked loop. Third and fourth phase locked loops provide inputs to the second phase locked loop to control the second local oscillator frequency. The operating frequencies of the first and second local oscillator signals are selected so that spurious signals generated in the phase locked loops do not interfere with a received RF signal in a conversion circuit.

Abstract: The system and method for switching a radio frequency (RF) signal between mixers can provide a large automatic gain control (AGC) range while maintaining low noise levels by using a switching circuit to select between at least two mixers that are switched between a common load using reverse biasing. To turn off a specific mixer, RF inputs to that mixer are reverse biased, which shuts off the current to the load. The full AGC of the switching circuit is approximately the sum of the AGC of each mixer. Each mixer has a limited AGC range, which limits the amount of current swing needed for the full AGC of the switching circuit. By dividing the switching circuit between two or more mixers, the transistor devices in each mixer may be sized appropriately with respect to the current levels being used in each mixer. For instance, in a mixer designed specifically for low noise applications, the transistor devices can be very large.

Abstract: A band switchable resonant circuit for a voltage controlled oscillator has an inductive component in parallel with a plurality of varactor diodes. Some of the varactor diodes are selectively switchable to control the frequency range of circuit operation.

Abstract: There is disclosed a fully integrated television receiver for receiving a standard antenna or cable input and outputting a standard video baseband signal and a standard audio baseband signal. The receiver employs an up-conversion mixer and a down-conversion image-rejection mixer in series to produce an on-chip IF signal. Audio detection of the IF signal is performed via an audio delay-locked loop operating in quadrature to the audio FM signal. Video detection of the IF signal is performed by frequency mixing the IF signal with the extracted video carrier of the IF signal. Variable load drive capability is provided for both the video output and the audio output.

Abstract: A monolithic device is shown having a number of phase locked loops (PLLs) constructed thereon. At least one of the PLLs is constructed as a multiple loop having an output of one PLL loop tied back to the feedback path of the other loop of the pair. In this manner, tight resolution can be obtained in one loop while the bandwidth of that loop is coarse. The bandwidth of the second loop is tight, thereby giving good resolution to the first loop while still avoiding the problems inherent with noise injection locking from other PLLs on the same device.

Abstract: A system and method for establishing the frequency of a voltage controlled oscillator ("VCO") within narrowly defined frequency bands. The resonant circuit of the VCO uses selectable elements, such as varactor diodes, to establish the operating frequency band. The control voltage of the VCO is varied within a voltage range to adjust the VCO output frequency. A phase detector compares the VCO output to a reference signal. If the phase detector determines that there is an imbalance between the VCO output and the reference signal, then it produces a signal which indicates whether the VCO frequency should be increased or decreased to match the reference signal frequency. If the control voltage is outside of the voltage range, then the system allows the operating frequency band to be changed by varying the number of selectable elements in response to the phase detector signal.

Abstract: The system and method for phase lock loop (PLL) gain stabilization uses a digital compensation technique to correct for the large amount of gain variation present in a voltage controlled oscillator (VCO) utilizing a varactor diode. AVCO is arranged with additional capacitance in parallel with the vatactor diode of the VCO. By using multiple capacitors, more or less capacitance can be switched into parallel with the vatactor diode. Gain variation is accomplished by switching capacitors into the circuit, and for each combination of capacitors used in the resonant inductance-capacitance (LC) circuit of the VCO, the gain of the phase detector in the PLL is adjusted simultaneously. The phase detector has a charge pump that drives a current into a loop filter having a capacitor with a fixed value. The gain adjustment is accomplished by varying the amount of current available from the charge pump to this filter capacitor.