Patents Assigned to Mindspeed Technologies, Inc.
  • Patent number: 9356591
    Abstract: A crosspoint switch device has a plurality of input ports each connected to a respective voltage source and a plurality of output ports each connected to a respective voltage source. A switch array selectively provides signal paths between the input ports and the output ports. The voltage sources are separate from one another.
    Type: Grant
    Filed: April 2, 2012
    Date of Patent: May 31, 2016
    Assignee: Mindspeed Technologies, Inc.
    Inventors: Poupak Khodabandeh, Merrick Brownlee
  • Patent number: 9269365
    Abstract: There is provided a method of encoding an input speech signal. The method comprises identifying a fixed codebook vector from a fixed codebook; identifying an adaptive codebook vector from a adaptive codebook; calculating an adaptive codebook gain; reducing the adaptive codebook gain by an amount; optimally selecting a fixed codebook gain based on the adaptive codebook gain while both the fixed codebook vector and the adaptive codebook vector remain fixed; and converting the input speech signal into an encoded speech using the fixed codebook gain, the adaptive codebook gain, the fixed codebook vector and the adaptive codebook vector. The amount of reducing the adaptive codebook gain may be varied.
    Type: Grant
    Filed: July 11, 2008
    Date of Patent: February 23, 2016
    Assignee: Mindspeed Technologies, Inc.
    Inventors: Huan-Yu Su, Yang Gao
  • Patent number: 9245828
    Abstract: A package and integrated circuit assembly is configured to perform signal conditioning on a signal. The assembly includes a line card having line card contacts that correspond to conductors in the line card connector. Two or more integrated circuits are configured to perform signal conditioning on the signal and the two or more integrated circuits are configured within a package into at least a first row and a second row on the package. The package includes a grid array of bonding pads to electrically connect to the two or more integrated circuits through bond wires or down bonds such that the structure of the grid array corresponds in physical arrangement or bond pad pitch to the line card contacts. This assembly also includes an electrical connection from the two or more integrated circuits to the line card through the package.
    Type: Grant
    Filed: July 11, 2013
    Date of Patent: January 26, 2016
    Assignee: Mindspeed Technologies, Inc.
    Inventors: Atul K. Gupta, Ryan S. Latchman, Marek S. Tlalka
  • Patent number: 9190066
    Abstract: In accordance with one aspect of the invention, a selector supports the selection of a first encoding scheme or the second encoding scheme based upon the detection or absence of the triggering characteristic in the interval of the input speech signal. The first encoding scheme has a pitch pre-processing procedure for processing the input speech signal to form a revised speech signal biased toward an ideal voiced and stationary characteristic. The pre-processing procedure allows the encoder to fully capture the benefits of a bandwidth-efficient, long-term predictive procedure for a greater amount of speech components of an input speech signal than would otherwise be possible. In accordance with another aspect of the invention, the second encoding scheme entails a long-term prediction mode for encoding the pitch on a sub-frame by sub-frame basis.
    Type: Grant
    Filed: January 26, 2009
    Date of Patent: November 17, 2015
    Assignee: Mindspeed Technologies, Inc.
    Inventor: Yang Gao
  • Patent number: 9164770
    Abstract: There is provided a method of performing single instruction multiple data (SIMD) operations. The method comprises storing a plurality of arrays in memory for performing SIMD operations thereon; determining a total number of SIMD operations to be performed on the plurality of arrays; loading a counter with the total number of SIMD operations to be performed on the plurality of arrays; enabling a plurality of arithmetic logic units (ALUs) to perform a first number of operations on first elements of the plurality of arrays; performing the first number of operations on first elements of the plurality of arrays using the plurality of ALUs; decrementing the counter by the first number of operations to provide a remaining number of operations; and enabling a number of the plurality of ALUs to perform the remaining number of operations on second elements of the plurality of arrays.
    Type: Grant
    Filed: November 23, 2009
    Date of Patent: October 20, 2015
    Assignee: Mindspeed Technologies, Inc.
    Inventor: Patrick D. Ryan
  • Patent number: 9119241
    Abstract: A system is disclosed to automatically establish proper biasing for light sources in a color mixed projection system having multiple light sources which are active at the same time. Responsive to a feedback signal, a single DC-DC converter generates the bias voltage for the light sources. Comparators compare a headroom signal for each light source to a reference value to generate comparator output signals. The comparator output signals are processed by a channel selector and a digital filter/DAC module. The channel selector controls a switch to selectively provide and combine a headroom signal with an output of the digital filter/DAC module to create the feedback signal. By monitoring each headroom value, the bias voltage is adjusted, based on the feedback signal, until every headroom signal reaches the reference value thereby achieving sufficient biasing for every active light source in the color mixed projection system.
    Type: Grant
    Filed: December 23, 2013
    Date of Patent: August 25, 2015
    Assignee: Mindspeed Technologies, Inc.
    Inventors: Cristiano Bazzani, Fabio Gozzini, Steven Van Nguyen
  • Patent number: 9107245
    Abstract: A current driver circuit, for driving a light source, that provides high accuracy and reduced power consumption is disclosed. The driver includes a digital to analog converter configured to receive a digital value representing a light intensity and convert the digital value to an analog current signal. A current mirror is configured to receive the analog current signal and create a current mirror output which is larger than the analog current signal based on a ratio of the current mirror. This results in a modified analog current signal. A light source receives the modified analog current signal, and responsive thereto generate a light signal such that the light signal has an intensity controlled by the digital value. One or more amplifiers are also part of the current driver and configured to increase response time and accuracy.
    Type: Grant
    Filed: June 9, 2012
    Date of Patent: August 11, 2015
    Assignee: Mindspeed Technologies, Inc.
    Inventors: Cristiano Bazzani, Fabio Gozzini, Tao Chen
  • Patent number: 9063779
    Abstract: There is provided a multi-core system that provides automated task list generation, parallelism templates, and memory management. By constructing, profiling, and analyzing a sequential list of functions to be executed in a parallel fashion, corresponding parallel execution templates may be stored for future lookup in a database. A processor may then select a subset of functions from the sequential list of functions based on input data, select a template from the template database based on particular matching criteria such as high-level task parameters, finalize the template by resolving pointers and adding or removing transaction control blocks, and forward the resulting optimized task list to a scheduler for distribution to multiple slave processing cores. The processor may also analyze data dependencies between tasks to consolidate tasks working on the same data to a single core, thereby implementing memory management and efficient memory locality.
    Type: Grant
    Filed: January 6, 2010
    Date of Patent: June 23, 2015
    Assignee: Mindspeed Technologies, Inc.
    Inventors: Nick J. Lavrov, Nour Toukmaji
  • Patent number: 8934598
    Abstract: An integrated system for adaptive equalization and jitter reduction of a video signal that includes an adaptive equalizer and a jitter cleaner located on one integrated circuit within a single package. An adaptive equalizer applies frequency specific signal modification to the received signal. A bit rate detector determines a bit rate of the video signal or the equalized signal. The jitter cleaner couples to the adaptive equalizer output and processes the equalized signal to reduce jitter in the equalized signal. A multiplexer receives the equalized signal and the jitter cleaner output and, responsive to a control signal, outputs either the equalized signal or the jitter cleaner output signal. A status monitor may optionally be included to compare the detected bit rate to a bit rate threshold, and a responsive to the comparing activate or deactivate the jitter cleaner and output either the equalized signal or jitter cleaner output.
    Type: Grant
    Filed: April 5, 2013
    Date of Patent: January 13, 2015
    Assignee: Mindspeed Technologies, Inc.
    Inventors: Atul Krishna Gupta, Ryan Suresh Latchman, Nicolas Alain Paul Nodenot
  • Patent number: 8924760
    Abstract: There is provided a method of scheduler assisted power management for semiconductor devices. By accessing and analyzing workload data for tasks to be completed, a scheduler may provide finer grained control for determining and implementing an efficient power management policy. In this manner, tasks with completion deadlines can be allocated sufficient resources without wasteful power consumption resulting from ramping up of performance through overestimating of voltage or frequency increases. Additionally, power management may be planned for longer periods, rather than looking only at immediate data to be processed and constantly fluctuating voltage and frequency. In this manner, power management can run more smoothly and efficiently compared to conventional means of power management that ignore data from a scheduler when determining power management policy.
    Type: Grant
    Filed: January 8, 2010
    Date of Patent: December 30, 2014
    Assignee: Mindspeed Technologies, Inc.
    Inventors: Xiaoming Li, Surinderjit S. Dhaliwal
  • Patent number: 8922298
    Abstract: A cable emulator configured to emulate the electrical transfer function and properties of a length of conductive cable is disclosed for use in transmitter, receiver and transceiver operation without need for long and expensive length of actual cable. The cable emulator includes an input port for connection to a signal source, such as a transmitter and an output port for connection to a receiver or other signal analyzer. The input port connects to an input impedance matching element, which in turn connects to one or more filter stages. The output of the one or more filter stages connects to an output impedance matching element, which then connects to the output port. The one or more filter stage comprises one or more resistors, one or more inductors and one or more capacitors.
    Type: Grant
    Filed: December 1, 2010
    Date of Patent: December 30, 2014
    Assignee: Mindspeed Technologies, Inc.
    Inventors: Nader Kalantari, Alfredo Moncayo
  • Patent number: 8879435
    Abstract: Various embodiments of systems and methods for memory access are provided. In one embodiment, a data segment is stored in a plurality of memory segments of at least one memory bank. The data segment stored in the memory segments is selected, where the data segment has a bit boundary that is arbitrarily misaligned with at least one memory segment boundary of the memory segments.
    Type: Grant
    Filed: December 21, 2004
    Date of Patent: November 4, 2014
    Assignee: Mindspeed Technologies, Inc.
    Inventor: Karl G. Andersson
  • Patent number: 8872487
    Abstract: A DC-DC converter is disclosed having an input configured to receive an input signal and an output configured to present an output signal at a different voltage than the input signal. The converter also includes at least one inductor and at least one capacitor. Two or more transistors fingers are provided such that at least one of the two or more transistor fingers comprises two or more switching transistors, each of which has an input, an output, a control input. An activation controller connect to at least one of the two or more switching transistors, the activation controller configured to control whether the at least one of the two or more switching transistors is active or non-active. Also disclosed is a buck-boost converter with numerous controlled switches that establish the converter in either buck-boost mode, buck mode or boost mode.
    Type: Grant
    Filed: August 28, 2012
    Date of Patent: October 28, 2014
    Assignee: Mindspeed Technologies, Inc.
    Inventors: Massimiliano Belloni, Piero Malcovati, Andrea Baschirotto, Cristiano Bazzani
  • Patent number: 8869163
    Abstract: There is provided a system and method for providing an integrated environment for execution monitoring and profiling of applications running on multi-processor system-on-chips. There is provided a method comprising obtaining task execution data of an application, the task execution data including a plurality of task executions assigned to a plurality of hardware resources, showing a scheduler view of the plurality of task executions on a display, receiving a modification request for a selected task execution from the plurality of task executions, reassigning the plurality of task executions to the plurality of hardware resources based on implementing the modification request, and updating the scheduler view on the display. As a result, the high level results of specific low level optimizations may be tested and retried to discover which optimization routes provide the greatest benefits.
    Type: Grant
    Filed: July 19, 2011
    Date of Patent: October 21, 2014
    Assignee: Mindspeed Technologies, Inc.
    Inventors: Abdulnour Toukmaji, Dmytro Lysenko, Sumesh Subramanian
  • Patent number: 8798044
    Abstract: An integrated circuit device for switching data has a plurality of input channels and a plurality of output channels. The device includes a switch for selectively connecting a subset of the output channels, mutually orthogonal, to the input channels by providing signal paths between the selected mutually orthogonal output channels and the input channels. The selected output channels are not orthogonal to the output channels that are not selected.
    Type: Grant
    Filed: April 27, 2011
    Date of Patent: August 5, 2014
    Assignee: Mindspeed Technologies, Inc.
    Inventor: Atul Krishna Gupta
  • Patent number: 8761387
    Abstract: An analog transmit side crosstalk cancellation system is disclosed which is located at or near the connector of a communication channel, cable, or backplane. When configured as a connector, multiple signal paths are provided within the cancellation system. Input nodes and output nodes provide access into the connector of a received signal and out of the connector for processed signals. The crosstalk canceller comprises a delay, a filter, and an amplifier. These elements operate in conjunction to generate crosstalk cancellation signals. For a particular received signal, cancellation signals are combined therewith from one or more adjacent channels. The crosstalk cancellation system may be configured as part of a connector or an intermediary device between the communication device or card and conductors. The connector may be attached to the communication device or as part of the cable.
    Type: Grant
    Filed: May 3, 2007
    Date of Patent: June 24, 2014
    Assignee: Mindspeed Technologies, Inc.
    Inventor: Charles E. Chang
  • Patent number: 8750341
    Abstract: An optical signal generator is configured with an associated control system and driver configured to reduce speckle. Speckle reduction occurs by pulsing the drive signal between a first current level and a second current level. These pulses force the optical signal generator to introduce oscillations into the optical signal. The coherence of the emitted light is reduced during the period of oscillations in the optical signal, which reduces speckle. In one embodiment, the pulsing of the drive signal brings the drive signal down to a level near or below threshold, which in turn intermittently turns off the optical signal output. Returning the optical signal to a desired optical output intensity introduces the speckle reducing oscillation. The pulse frequency, and duty cycle is controlled by a duty cycle control signal to modulate overall optical power and adjust amount of despeckle.
    Type: Grant
    Filed: July 15, 2008
    Date of Patent: June 10, 2014
    Assignee: Mindspeed Technologies, Inc.
    Inventors: Cristiano Bazzani, Daniel Draper, Kevin B. McDonald
  • Publication number: 20140152272
    Abstract: A reconfigurable DC-DC converter including a controller is disclosed which automatically adjusts the mode of operation (buck mode or boost mode) depending on the system requirements and is able to achieve the maximum efficiency and the lowest inductance current. The method of switching between buck and boost mode allows the converter to operate to 100% duty cycle for buck mode and 0% duty cycle for boost mode. This maximizes efficiency since the buck-boost mode of operation is eliminated and improves the stability and reliability of the system. A converter output voltage is processed and compared to a control voltage to generate buck and boost comparator output signals. The buck and boost comparator output signals are provided to control logic, which generates switch control signals, which are provided to the DC-DC converter to establish buck mode, boost mode, or pass-through mode.
    Type: Application
    Filed: December 2, 2013
    Publication date: June 5, 2014
    Applicant: Mindspeed Technologies, Inc.
    Inventors: Cristiano Bazzani, Fabio Gozzini
  • Patent number: 8717093
    Abstract: There is provided a semiconductor package configured for externally controlled power management. Instead of integrating voltage regulation on-chip as done conventionally, power regulation is moved externally to the PCB level, providing numerous package advantages including size, simplicity, power efficiency, integration flexibility, and thermal dissipation. In particular, the use of flip-chip package configurations provides ready access to power supply bumps, which also allows the use of a universal receiving PCB and power supply through simple reconfiguring of voltage traces. As a result, flexible power management can be implemented, and portions of semiconductor packages may be managed for performance or thermal considerations, which may be of particular use for applications such as multi-core processors.
    Type: Grant
    Filed: January 8, 2010
    Date of Patent: May 6, 2014
    Assignee: Mindspeed Technologies, Inc.
    Inventors: Xiaoming Li, Surinderjit S. Dhaliwal
  • Publication number: 20140111114
    Abstract: A system is disclosed to automatically establish proper biasing for light sources in a color mixed projection system having multiple light sources which are active at the same time. Responsive to a feedback signal, a single DC-DC converter generates the bias voltage for the light sources. Comparators compare a headroom signal for each light source to a reference value to generate comparator output signals. The comparator output signals are processed by a channel selector and a digital filter/DAC module. The channel selector controls a switch to selectively provide and combine a headroom signal with an output of the digital filter/DAC module to create the feedback signal. By monitoring each headroom value, the bias voltage is adjusted, based on the feedback signal, until every headroom signal reaches the reference value thereby achieving sufficient biasing for every active light source in the color mixed projection system.
    Type: Application
    Filed: December 23, 2013
    Publication date: April 24, 2014
    Applicant: MINDSPEED TECHNOLOGIES, INC.
    Inventors: Cristiano Bazzani, Fabio Gozzini, Steven Van Nguyen