Patents Assigned to Mistubishi Denki Kabushiki Kaisha
  • Publication number: 20050191970
    Abstract: A cellular phone (1), (30), (60), (70) in which different types of plural cards (5), (6) are freely detachably mounted, is equipped with a housing (2), (31), (71), a first accommodating portion (4) which is formed in the housing and accommodates therein a battery pack (3), and a second accommodating portion (7) which is formed on a position which is non-overlapped with the first accommodating portion (4) of the housing and accommodates therein the different types of plural cards (5), (6) so that the plural cards are stacked.
    Type: Application
    Filed: July 1, 2002
    Publication date: September 1, 2005
    Applicant: MISTUBISHI DENKI KABUSHIKI KAISHA
    Inventor: Manabu Hasegawa
  • Patent number: 6476981
    Abstract: A retrofocus lens system comprises a first lens group having a negative power, a second lens group having a positive power, and a third lens group having a positive power. The first lens group includes a first lens, a meniscus-shaped second lens having a negative power and a convex surface facing the large conjugate side, a third lens having a negative power, and a fourth lens. The second lens group includes a fifth lens having a positive power. The third lens group includes a sixth lens having a negative power, both surfaces of which are concave, a seventh lens having a positive power, both surfaces of which are convex, an eighth lens having a positive power, both surfaces of which are convex, and a ninth lens having a positive axial power. The system satisfies 0.9<f2/f3<1.8, 1.5<|f1|/f<2.
    Type: Grant
    Filed: June 21, 2000
    Date of Patent: November 5, 2002
    Assignee: Mistubishi Denki Kabushiki Kaisha
    Inventor: Shinsuke Shikama
  • Patent number: 6100613
    Abstract: In this compact rectifier, a arcuate bodies of a positive heat sink and a arcuate body of a negative heat sink are arranged in a coaxial manner while positioning major surfaces thereof at the same plane position. A plurality of positive diodes are mounted on the major surface of the arcuate body of the positive heat sink along the circumferential direction in such a manner that leads are directed toward an outer circumferential side. On the other hand, while a plurality of negative diodes offset by a preselected amount along the circumferential direction with respect to the positive diodes with directing the lead to an inner circumferential side, these plural negative diodes are mounted on the major surface of the arcuate body of the negative heat sink.
    Type: Grant
    Filed: August 28, 1998
    Date of Patent: August 8, 2000
    Assignee: Mistubishi Denki Kabushiki Kaisha
    Inventors: Kazunori Tanaka, Katsumi Adachi
  • Patent number: 5812432
    Abstract: An apparatus for synchronously controlling the actual operation of a machine using one or more motors, such as servo motors, by simulating in program form a combination of selectable machine mechanisms, including drivers, connecting shafts, clutches, gears and cams. Each such machine mechanism is represented by a virtual mechanism, preferably as a software module that contains information uniquely identifying the module, operation information that defines the generation of position information and connection information that defines other modules to which connection is made. The software modules comprise drive modules for generating position information, transmission modules for simulating the transmission mechanisms and output modules for outputting motor commands.
    Type: Grant
    Filed: December 29, 1994
    Date of Patent: September 22, 1998
    Assignee: Mistubishi Denki Kabushiki Kaisha
    Inventors: Yoshichika Takizawa, Yasuyuki Suzuki, Misako Okada, Makoto Nishimura, Hidehiko Matsumoto, Yasuharu Kudo, Tohru Tsujimoto
  • Patent number: 5524028
    Abstract: A horizontal synchronizing signal is counted by a binary counter. A first switch is switched in response to the count value, whereby signal data is classified. A sampling clock signal is counted by a binary counter. An output of the first switch is switched by second and third switches in response to the count value, whereby the data input rate of signal data is reduced. Each classified signal is subjected to filtering by a two-dimensional FIR digital filter.
    Type: Grant
    Filed: September 3, 1993
    Date of Patent: June 4, 1996
    Assignees: Hiroaki Terada, Mistubishi Denki Kabushiki Kaisha, Sharp Kabushiki Kaisha
    Inventors: Hiroaki Terada, Makoto Iwata, Masayuki Mizuno
  • Patent number: 5326989
    Abstract: A thin film transistor is used as a load transistor in a memory cell in a SRAM. A load thin film transistor is arranged on an interlayer insulating layer on the surface of a silicon substrate. A silicon layer in which source/drain regions of the thin film transistor are formed is covered with an oxidation preventing film. An interlayer insulating layer which is to be subject to high temperature reflow processing is formed on the surface of the oxidation preventing film. The oxidation preventing film is formed of polycrystalline silicon, amorphous silicon, silicon nitride, or the like and formed on the silicon layer in the thin film transistor directly or through an insulating layer to cover the surface of the silicon layer.
    Type: Grant
    Filed: March 4, 1992
    Date of Patent: July 5, 1994
    Assignee: Mistubishi Denki Kabushiki Kaisha
    Inventor: Takeo Muragishi