Abstract: In a fire control system for an elevator, the time for the fire and smoke to reach the elevator hall of each floor of a building during fire is pre-calculated as the evacuation time of the floor. When the evacuation time of a floor is longer than the time for making a car respond to a rescue call from the evacuation floor, the floor is judged as a rescue floor, and when shorter, the floor is judged as a non-rescue floor. Furthermore, the order in which the rescue is carried out among the rescue floors is determined. Accordingly, it is possible to rescue remainders on a rescue floor using an elevator as an evacuation means. Moreover, since rescue operation by the elevator is performed with the order of rescue determined, rescue operation suitable for the conditions of the fire can be realized.

Abstract: A control apparatus for an internal combustion engine prevents variation of an air fuel ratio even upon introduction of purge air. A delay time occurring until the intake air detected, after having arrived at the combustion chamber through a surge tank, influences an air fuel ratio sensor, a delay time occurring until purge air containing evaporated fuel generated upon purging a canister, after having arrived at the combustion chamber through the surge tank, influences the air fuel ratio sensor, and a delay time occurring until fuel supplied by an injector, after having arrived at the combustion chamber, influences the air fuel ratio sensor, are represented by simplified physical models. A purge rate in the combustion chamber or in the neighborhood of the air fuel ratio sensor is calculated by using the physical models, and a purge air concentration and a fuel correction amount are calculated based on the purge rate thus obtained.

Abstract: A word line and a cell plate electrode line are formed at a common interconnection layer. A redundant replacement unit for a faulty row is set corresponding to the cell plate electrode line. For each redundant replacement unit, a program element is arranged for stopping supply of a cell plate voltage from the cell plate voltage line to the cell plate electrode line. The program element corresponding to the cell plate electrode line short-circuited to the word line nonvolatilely changes from the on state to the off state in response to an externally supplied input instruction.

Abstract: A data processor in accordance with the present invention makes it possible to perform pre-branch processing with respect to a return address in the initial stage of pipeline processing also on a subroutine return instruction, and therefore by providing a stack memory (PC stack) dedicated to a program counter (PC) for storing only return addresses of the subroutine return instruction, in executing a subroutine call instruction in an execution stage of a pipeline processing mechanism, the return address from the subroutine is pushed to the PC stack, and the pre-branch processing is performed to the address popped from the PC stack in decoding the subroutine return instruction in an instruction decoding stage.

Abstract: A data processor in accordance with the present invention makes it possible to perform pre-branch processing with respect to a return address in the initial stage of pipeline processing also on a subroutine return instruction, and therefore by providing a stack memory (PC stack) dedicated to a program counter (PC) for storing only return addresses of the subroutine return instruction, in executing a subroutine call instruction in an execution stage of a pipeline processing mechanism, the return address from the subroutine is pushed to the PC stack, and the pre-branch processing is performed to the address popped from the PC stack in decoding the subroutine return instruction in an instruction decoding stage.

Abstract: This invention relates to a data processor with pipelining system, which is provided with at least two stages each having working stackpointers, and so constructed that each stage can independently refer to the working stackpointer corresponding to each stage, and the renewal of each working stackpointer corresponding to each stage occurs synchronously with pipeline processing, so that when execution of a plural instructions including designation of operands under stack-push addressing mode and stack-pop addressing mode, result of address calculation executed at the address calculation stage is sequentially transferred to a corresponding working stackpointer in a next pipeline stage. This is synchronized with the transfer of instructions through the stages of pipeline, thereby being possible for the data processor to smoothly execute pipelining process.