Abstract: A latch ram including on a single chip a memory array, an address latch and associated row and column decoders for addressing particular locations within the memory array, data I/O and associated column I/O circuitry for inputting data to and outputting data from the memory array, and microprocessor-controlled logic for controlling the input and output of such data. The device is packaged in a 28-pin DIP or SO package.

Abstract: A charge-pump phase locked loop circuit is disclosed that is capable of operating with a high bandwidth while having a low associated noise jitter characteristic. In addition, the phase locked loop circuit has a high dynamic range and prevents against false locking to sub-harmonic frequencies. Furthermore, common mode noise rejection and other internal noise rejection characteristics are optimized.

Abstract: A resistor located above the semiconductive substrate of an integrated circuit chip can be made smaller than prior art resistors because no area is allocated for resistor contacts. During manufacture, a resistive strip having the width of the intended resistor is formed. A photoresist mask protects the top and sides of the resistive strip where the resistor is located, and etching exposes the ends but not the top and sides of the resistor. Contact to the resistor occurs at the upwardly extending (usually near vertical) end surfaces of the resistor.

Abstract: A method for forming substrate contacts in an integrated circuit structure uses a layer of conductive material, preferably polycrystalline silicon, applied to the surface of the semiconductor structure to make electrical contact with exposed portions of the substrate. The polycrystalline silicon layer is then coated with a nitride layer. A via mask which is opaque over the region where a contact will be formed produces a photoresist stud smaller that the original via mask. The photoresist stud is used to pattern the nitride to remain only over the contact region. Following this, the polycrystalline silicon is oxidized except at the nitride mask, forming a bird's beak beneath edges of the nitride. The resulting contact is smaller than the photolithographic limit of the via mask and thus allows for smaller space allocated for contact regions and smaller total structure.