Abstract: A memory array for computing-in-memory (CIM) is disclosed. The memory array for CIM includes a bit cell array, at least one word line and at least one bit line. The bit cell array has a plurality of bit cells, wherein each bit cell is operated at an operating voltage. The at least one word line is electrically connected to the bit cell array, wherein the at least one word line is associated with a first parameter. The at least one bit line is electrically connected to the bit cell array, wherein the bit cells extend along a specific direction, each the at least one bit line has an electrical parameter associated therewith, each the bit cell is associated with a second parameter, a first quantity of the plurality of bit cells of the bit cell array extends along the specific direction, and the memory array determines how an expansion associated with at least one of the first parameter and the second parameter is according to the specific direction.

Abstract: Provided is a method for preventing or treating a liver disease, including administering a therapeutically effective amount of pharmaceutical composition to a subject in need, and the pharmaceutical composition includes the isothiocyanate structural modified compound and a pharmaceutically acceptable carrier thereof.

Abstract: A high electron mobility transistor and a method for fabricating the same is disclosed. Firstly, a lattice matching layer, a channel layer, and an AlGaN layer are sequentially formed on a growth substrate. The AlGaN layer includes a first area, a second area, and a third area, wherein the second area is located between the first area and the third area. Then, an insulation block is formed on the second area of the AlGaN layer and two GaN blocks are respectively formed on the first area and the third area of the AlGaN layer. Two InAlGaN blocks are respectively formed on the GaN blocks and the insulation block is removed. Finally, a gate is formed to interfere the second area of the AlGaN layer and a source and a drain are respectively formed on the InAlGaN blocks.

Abstract: A high electron mobility transistor includes a growth substrate, a lattice matching layer, an back-barrier layer, an electron blocking layer, a channel layer, an active layer, a source, a gate, and a drain. The lattice matching layer and the back-barrier layer are formed on the growth substrate. The back-barrier layer includes GaN doped with C. The electron blocking layer is formed on the back-barrier layer. The electron blocking layer includes AlGaN, wherein the doping percent of Al atoms of the AlGaN is 3˜5% and the doping percent of Ga atoms of the AlGaN is 95˜97%. The electron blocking layer has a thickness of 2˜5 nm. The channel layer and the active layer are formed on the electron blocking layer. The source, the gate, and the drain are formed on the active layer.

Abstract: A modular pneumatic somatosensory device comprises a main body, a plurality of airbags, a plurality of inflating modules and a control module. The airbags are detachably disposed at different positions of the main body, and at least a part of the airbags have different sizes. The inflating modules are detachably disposed on the main body, and each inflating module is correspondingly connected with at least one of the airbags. The control module is detachably disposed on the main body and is electrically connected with the inflating modules. The control module controls the inflating modules to inflate the corresponding airbags according to a control signal.

Abstract: The present invention relates to a lithium metal powder, a preparing method thereof, and an electrode including the same, wherein the method for preparing the lithium metal powder includes: providing a lithium metal material and a ultrasonication solution; mixing the lithium metal material and the ultrasonication solution to form a mixed solution; and ultrasonically vibrating the mixed solution to form a lithium metal powder, wherein the lithium metal powder is covered by a protective layer, and the aforementioned protective layer includes a protective layer material, wherein the protective layer material includes a sulfide, fluoride, or nitride, or a combination thereof.

Abstract: A method for making iridium oxide nanoparticles includes dissolving an iridium salt to obtain a salt-containing solution, mixing a complexing agent with the salt-containing solution to obtain a blend solution, and adding an oxidating agent to the blend solution to obtain a product mixture. A molar ratio of a complexing compound of the complexing agent to the iridium salt is controlled in a predetermined range so as to permit the product mixture to include iridium oxide nanoparticles.

Abstract: A robot controlling method includes following operations. A depth image is obtained by the depth camera. A processing circuit receives the depth image and obtains an obstacle parameter of an obstacle and a tool parameter of a tool according to the depth image. The tool is set on the end of a robot. The processing circuit obtains a distance vector between the end and the obstacle parameter. The processing circuit obtains a first endpoint vector and a second endpoint vector between the tool parameter and the obstacle parameter. The processing circuit establishes a virtual torque according to the distance vector, the first endpoint vector, and the second endpoint vector. The processing circuit outputs control signal to the robot according to the tool parameter, the obstacle parameter and the virtual torque to drive the robot to move or rotate the tool to a target.

Abstract: A method and a system for mental index prediction are provided. The method includes the following steps. A plurality of images of a subject person are obtained. A plurality of emotion tags of the subject person in the images are analyzed. A plurality of integrated emotion tags in a plurality of predetermined time periods are calculated according to the emotion tags respectively corresponding to the images. A plurality of preferred features are determined according to the integrated emotion tags. A mental index prediction model is established according to the preferred features to predict a mental index according to the emotional index prediction model.

Abstract: A gate fabrication method of an UMOSFET and a trench gate structure formed thereof are provided, comprising providing a transistor structure and a lithography process is employed to define a trench region. A gate oxide layer is deposited along the trench and two polysilicon sidewalls having a spacing there in between are formed afterwards. A wet etching is used to remove the gate oxide layer underneath the polysilicon sidewalls such that a vacancy is formed at the trench bottom. By oxidizing the polysilicon sidewalls, a thick oxide layer is formed, enfolding periphery of the polysilicon sidewalls and filling the vacancy. The spacing can be alternatively retained between the polysilicon sidewalls covered with the thick oxide layer, such that the trench can be alternatively filled. The present invention is effective in increasing oxide thickness of the gate bottom, reducing the trench corner curvature as well as the feedback capacitance.

Abstract: A crystal oscillator includes an oscillating substrate, a hollow frame, a first electrode, and a second electrode. The oscillating substrate includes a main oscillating region and a thinned region that has a thickness smaller than that of the main oscillating region. The first and second electrodes are disposed on a first surface of the oscillating substrate and a second surface opposite to the first surface, respectively. The hollow frame is disposed on the second surface. The second electrode includes a second electrode portion that has at least one opening in positional correspondence with the thinned region. A method for making the crystal oscillator is also provided herein.

Abstract: A three-dimensional source contact structure and its fabrication process method thereof are applicable to a power device, in which an inter-layer dielectric is deposited thereon. A lithography process is applied for forming a first and second dielectric layer. A spacer is respectively provided on opposite sidewalls of the first and second dielectric layer. And a shallow trench process is sequentially performed along the opposite surfaces of the spacers. The spacers are removed after the shallow trench process is complete for exposing a first and a second metal-source surface contact region. The present invention achieves in increasing horizontal surface contact and longitudinal vertical contact when depositing a source contact metal, thereby a step-like three-dimensional source contact structure can be formed. By employing the present invention, it enhances to reduce cell pitch effectively and can be widely applied to various power devices having MOSFET structure thereof.

Abstract: A three-dimensional source contact structure and fabrication process method thereof are provided. A lithography process and shallow trench process are sequentially performed to form a metal contact window in a power device. A source heavily doped area is divided by the metal contact window into a first and second heavily doped region. A lateral etching process is applied to an inter-layer dielectric to form a first and a second dielectric layer, each of which is in a trapezoid shape. Meanwhile, a first and a second metal-source surface contact regions are exposed. A longitudinal surface exposed by the shallow trench process is beneficial to increase vertical contact when depositing a source contact metal, thereby a step-like three-dimensional source contact structure can be formed. The present invention achieves in reducing cell pitch effectively and can be widely applied to various power devices having MOSFET structure thereof.

Abstract: A process method for fabricating a three-dimensional source contact structure is provided, which is applicable to form a step-like three-dimensional source contact structure in a MOSFET of a power device. The proposed method sequentially adopts a lithography process and a shallow trench process to form a metal contact window. And a lateral etching process, or spacers which will be removed eventually, can be alternatively provided for increasing horizontal surface contact when depositing a source contact metal. Meanwhile, a longitudinal surface exposed by the shallow trench process is also beneficial to increase vertical contact when depositing the source contact metal. As a result, a step-like three-dimensional source contact structure can be formed by employing the present invention. It is believed that the present invention achieves in reducing cell pitch effectively and can be widely applied to various power devices having MOSFET structure thereof.

Abstract: A computing-in-memory apparatus is provided, which includes a voltage regulator having an amplifier and a reference current source, a computing-in-memory array having a plurality of computing units and a detection circuit connected to each other. The amplifier has a current input and a voltage output and is connected to the reference current source, and the voltage regulator provides an output voltage for supplying to the computing-in-memory array. An output current of the detection circuit is inputted into the voltage regulator to compare with the reference current source of the voltage regulator, and then a negative feedback convergence or a negative feedback mechanism is executed according to the comparison result to regulate the output voltage supplied by the voltage regulator to the computing-in-memory array.

Abstract: A transistor includes a first semiconductor layer, a second semiconductor layer, a semiconductor nanosheet, a gate electrode and source and drain electrodes. The semiconductor nanosheet is physically connected to the first semiconductor layer and the second semiconductor layer. The gate electrode wraps around the semiconductor nanosheet. The source and drain electrodes are disposed at opposite sides of the gate electrode. The first semiconductor layer surrounds the source electrode, the second semiconductor layer surrounds the drain electrode, and the semiconductor nanosheet is disposed between the source and drain electrodes.

Abstract: A device comprises a first semiconductor layer, a dielectric layer, a second semiconductor layer, and a gate structure. The first semiconductor layer is over a substrate. The first semiconductor layer comprises a first channel region and first source/drain regions on opposite sides of the first channel region. The dielectric layer is over the first semiconductor layer. The second semiconductor layer is over the dielectric layer. The second semiconductor layer comprises a second channel region and second source/drain regions on opposite sides of the second channel region. The gate structure comprises a first portion extending in the dielectric layer, a second portion wrapping around the first channel region of the first semiconductor layer, and a third portion wrapping around the second channel region of the second semiconductor layer.

Abstract: A robotic surgical system includes a surgical robot holding a surgical instrument, a wearable device worn by a person, a camera for capturing images, and a computer device. The camera captures images of a base marker, and a dynamic reference frame disposed on an affected part of a patient. The computer device calculates a plurality of conversion relationships among different coordinate systems, and controls the surgical robot to move the surgical instrument according to a pre-planned surgical path and based on the conversion relationships. Furthermore, the computer device transmits data of a 3D model and the pre-planned surgical path to the wearable device, such that the wearable device is configured to present the 3D model in combination with the pre-planned surgical path as an AR image based on the conversion relationships.

Abstract: The present invention provides a method of modulating the expression of a gene containing expanded nucleotide repeats in a cell, comprising: inhibiting the biological activity of SPT4 or SUPT4H; and regulating the formation of R-loops. The inhibition step can effectively reduce the expression of the gene containing the expanded nucleotide repeats and the regulatory step can further enhance the inhibition step. The inhibition step and the regulation step are for the purpose of regulating gene expression by interfering the capacity of RNA polymerase II transcribing over a DNA template with lengthy nucleotide repeats.

Abstract: The present invention provides an automatic positioning system of computed tomography equipment and a method for automatically positioning computed tomography equipment. By the system and the method of the present invention, a geometric locating correction is able to be made on the equipment before operating it. After the correction, the focal spot of the X-ray tube of the computed tomography equipment and the center of the X-ray detector are on the same straight line, so that a projection image close to the real image can be obtained to avoid offset or distortion in subsequent 3D mapping.