Patents Assigned to NEC Corproation
  • Patent number: 7333683
    Abstract: An LSI package having an optical interface is mounted on a surface of a photoelectric wiring board. The photoelectric wiring board and the optical interface are optically connected with sufficient precision. A wiring board side guide member including socket pins and guide pins is soldered and fixed onto the photoelectric wiring board including an optical transmission line, a guide pin, and a mirror. An optical interface side guide member having a fitting hole is glued to the optical interface. The optical interface is mounted on an interposer of the LSI package. The guide pin of the photoelectric wiring board is fitted into the fitting hole formed through the interposer. The guide pin of the guide member is fitted into the fitting hole of the guide member. As a result, position alignment between the optical interface and the photoelectric wiring board is conducted with high precision.
    Type: Grant
    Filed: October 7, 2005
    Date of Patent: February 19, 2008
    Assignee: NEC Corproation
    Inventors: Junichi Sasaki, Ichiro Hatakeyama, Kazunori Miyoshi, Hikaru Kouta, Kaichiro Nakano, Mikio Oda, Hisaya Takahashi, Mitsuru Kurihara
  • Patent number: 5554892
    Abstract: A high frequency power amplifier is implemented by a GaAs FET and is supplied with a positive and a negative power supply. The amplifier amplifies the power of an input signal and delivers the amplified signal to a high frequency switch. The high frequency switch is supplied switch control voltages in the form of the positive and negative voltages. Since the switch control voltages are implemented as the positive and negative voltages, a great difference in level between the switch control voltages is achievable which improves insertion loss. While the high frequency switch may also be implemented by GaAs FETs, the insertion loss will be further reduced if the negative voltage is applied to the high frequency switch only during transmission. In this case, current consumption will also be reduced if the generation of the negative voltage is controlled at the negative voltage source side.
    Type: Grant
    Filed: April 28, 1994
    Date of Patent: September 10, 1996
    Assignee: NEC Corproation
    Inventor: Hidehiko Norimatsu
  • Patent number: 5463580
    Abstract: In a semiconductor memory device including a plurality of word lines, a plurality of pairs of bit lines, a plurality of static memory cells, at intersections between the word lines and the pairs of bit lines, and at least one sense amplifier for sensing a difference in potential between a selected pair of bit lines, a resistive load is connected to a substantial center location of each of the bit lines.
    Type: Grant
    Filed: July 7, 1994
    Date of Patent: October 31, 1995
    Assignee: NEC Corproation
    Inventor: Kazuyuki Nakamura
  • Patent number: 5288518
    Abstract: A chemical vapor deposition method for forming a fluorine-containing silicon oxide film comprises introducing a gaseous mixture of alkoxysilane or its polymers as a source gas with fluoroalkoxysilane added thereto into a reaction chamber and performing decomposition of the gaseous mixture to deposit the fluorine-containing silicon oxide film onto a substrate. During the formation of the fluorine-containing silicon oxide film, at least one of compounds containing phosphorus or boron such as organic phosphorus compounds and organic boron compounds may be evaporated and introduced into said gaseous mixture, thereby adding at least one of phosphorus and boron to said fluorine-containing silicon oxide film. The fluorine-containing oxide film may be formed by effecting the decomposition of the gaseous mixture in the presence of ozone gas, or under ultraviolet radiation, or gas plasma.
    Type: Grant
    Filed: June 5, 1992
    Date of Patent: February 22, 1994
    Assignee: NEC Corproation
    Inventor: Tetsuya Homma