Abstract: A portable memory device dimensioned and configured as any of a removable flash memory card, a USB flash drive, and a jump drive and a method of wireless communication, wherein the portable memory device comprises a single housing component; a data storage component within the single housing component; and a wireless receiver operatively connected to the data storage component and within the single housing component, wherein the wireless receiver is adapted to receive wireless signals comprising radio signals, satellite signals, TV signals, and Bluetooth™ specification signals, and wherein the wireless receiver is adapted to wirelessly communicate with a LAN. The portable memory device may further comprise an interface component adapted to connect to a host computing device. Preferably, the TV signals comprise mobile TV signals.

Abstract: A system and method for downscaling signal data, where the system includes an antenna receiving video signal data; an analog-to-digital converter coupled to the antenna and converting the received analog signal data to digital signal data; a memory component storing video downscaling instructions; and a video downscaling processor, coupled to the memory component and the analog-to-digital converter, wherein the video downscaling processor, upon reading the video downscaling instructions from the memory component and executing the downscaling instructions: divides the digital video signal data into a plurality of blocks, wherein each block comprises a plurality of pixel elements; and cycles through the plurality of blocks, and for every block in the plurality of blocks, generates a new block, wherein the new block comprises a plurality of new pixels evenly spaced within the new block.

Abstract: A mobile telecommunications apparatus includes a portable media device adapted to receive electronic data through a network, the portable media device comprising a first antenna adapted to receive electromagnetic signals of a particular frequency, the frequency is at least one of a radio frequency and a television (TV) frequency, and a headset in electrical communication with the portable media device and adapted to receive the electronic data through the network, the headset includes a switch coupled to the first antenna, a second antenna coupled to the switch, and a headset speaker comprising at least one of a mono headset speaker and a stereo headset speaker, the switch is adapted to combine operation of the first antenna and the second antenna into a dual operation diversity receiver. The network may comprise a Digital Video Broadcasting over Handheld (DVB-H) network.

Abstract: A system and method of transmitting video in a time division multiplexing (TDM) system, wherein the method comprises identifying a video reference frame from a series of video frames; encoding a difference between the video reference frame and a video non-reference frame; placing the video reference frame at a beginning of a data burst; transmitting the series of video frames and the data burst from a transmitter to a mobile TV receiver; and the mobile TV receiver immediately locating the video reference frame upon receipt of the data burst. The method may further comprise the mobile TV receiver decoding the series of video frames. Additionally, the placing process results in a substantially non-existent channel switching delay in the mobile TV receiver. Moreover, the method may further comprise placing exactly one video reference frame at the beginning of the data burst. Preferably, the TDM system comprises a mobile TV system.

Abstract: A portable memory device dimensioned and configured as any of a removable flash memory card, a USB flash drive, and a jump drive and a method of wireless communication, wherein the portable memory device comprises a single housing component; a data storage component within the single housing component; and a wireless receiver operatively connected to the data storage component and within the single housing component, wherein the wireless receiver is adapted to receive wireless signals comprising radio signals, satellite signals, TV signals, and Bluetooth™ specification signals, and wherein the wireless receiver is adapted to wirelessly communicate with a LAN. The portable memory device may further comprise an interface component adapted to connect to a host computing device. Preferably, the TV signals comprise mobile TV signals.

Abstract: Frame buffer video compression on an input video stream to efficiently allocate and utilize memory used for storing reference frames in a video decoder includes parsing a video header to obtain a maximum number of reference frames (N), dividing an available frame buffer memory to hold [N+1] compressed frames, controlling a compression process to limit a size of each frame such that said size is not less than a frame buffer memory size divided by [N+1], parsing messages that contain reference frames by looking ahead in an input video stream buffer of the input video stream, and allocating memory for compressing a given reference frame based on a number of needed frames at a frame buffer. A quantization of the compression process may be adjusted to improve a picture quality of the input video stream.

Abstract: Enhancing a stream layer transmission for a MediaFLO™ mobile multimedia multicast system comprising a transmitter and a receiver. Code word (CW) computations are performed on a current channel being accessed by the receiver. A favorite channel that a user is statistically mostly likely to switch to on the receiver at any particular time is anticipated. The Overhead Information Symbols (OIS) for each favorite channel is periodically monitored. The receiver remains in a sleep mode while data bursts are received from non-favorite channels, and then wakes up during data bursts of the favorite channel. The same CW computations are performed on the favorite channel as were being performed on the current channel. A cyclic redundancy check (CRC) is performed once the CW computations are performed upon selecting the favorite channel.

Abstract: A digital front-end architecture for television receivers with sigma-delta ADC input. An input digital signal is fed to the architecture and the gain is controlled by a gain stage. In the first method, the gain stage is controlled by a first AGC. Here, the gain is increased if the first threshold value is larger than the magnitude of a complex phase-locked loop (CPLL) output, and the gain is decreased if the first threshold value is lower than the magnitude of the CPLL output. In the second method, the gain is controlled through a second AGC. The gain is controlled by increasing the gain if the second threshold value is larger than a line peak of the moving average filter output, and the gain is decreased if the second threshold value is lower than the peak. The second threshold value and the peak are compared in a peak search block.

Abstract: SECAM line identification in an analog television includes an accumulator that accumulates a FM demodulated output corresponding to a color reference tone for each SECAM line; a first leakage average filter receiving a first result from the accumulator; a second leakage average filter receiving a second result from the accumulator; and a line decision block comparing the first result and the second result. An apparatus for soft-decision based PAL switch detection in an analog television includes a burst locked oscillator (BLO) receiving a composite video signal as input and producing an instantaneous PAL switch signal for each line; a leakage average filter receiving the PAL switch signal and filtering noise from an output received from the BLO; and a switch detection block receiving a filtered output from the leakage average filter, and making a decision based on a sign of the filtered output of the leakage average filter.

Abstract: A system and method of transmitting video in a time division multiplexing (TDM) system, wherein the method comprises identifying a video reference frame from a series of video frames; encoding a difference between the video reference frame and a video non-reference frame; placing the video reference frame at a beginning of a data burst; transmitting the series of video frames and the data burst from a transmitter to a mobile TV receiver; and the mobile TV receiver immediately locating the video reference frame upon receipt of the data burst. The method may further comprise the mobile TV receiver decoding the series of video frames. Additionally, the placing process results in a substantially non-existent channel switching delay in the mobile TV receiver. Moreover, the method may further comprise placing exactly one video reference frame at the beginning of the data burst. Preferably, the TDM system comprises a mobile TV system.

Abstract: An optimized semiconductor chip pad configuration. The pad includes a pad circuit area Ap, a first dimension x and a second dimension y, in a chip having N number of pins on each side. The pins include a longitudinal axis, and the chip includes a chip core of length Lc. The method includes determining the first dimension x by dividing the length Lc by the N, determining the second dimension y by dividing the pad circuit area Ap by a result of a division of the length Lc by the N, and creating a semiconductor area pad that includes pins with the longitudinal axis positioned parallel to the chip core. A stack of circuits is designed in the chip to fit in the pad based on the first dimension x and the second dimension y.

Abstract: A technique for providing stable tracking performance to an AGC loop circuit comprises amplifying a wideband radio frequency signal; detecting signals and blockers adjacent to the radio frequency signal; lowering a gain of the radio frequency signal; mixing a local oscillator signal with the radio frequency signal; shifting a frequency of the radio frequency signal from a radio frequency to an intermediate frequency; continuously varying a gain of the intermediate frequency signal; converting the intermediate frequency signal into a digital output signal; comparing the digital output signal with predefined thresholds comprising an upper threshold and a lower threshold; switching a post mixer amplifier (PMA) to a high gain state when an input of a variable gain amplifier (VGA) is greater than the upper threshold, and switching the PMA to a low gain state when an input of the VGA is lower than the lower threshold.

Abstract: An apparatus and method for estimating Doppler frequency in a wireless communication network, wherein the method comprises determining a first correlation coefficient (c1) between a currently received Orthogonal Frequency Division Multiplexed (OFDM) symbol and an OFDM symbol received previous to the currently received OFDM symbol, and a second correlation coefficient (c2) between the currently received OFDM symbol and an OFDM symbol received immediately previous to the OFDM symbol received previous to the currently received OFDM symbol; performing a leaky integration across OFDM symbols of the resulting first and second correlation coefficients (c1, c2) to obtain an estimate of the first and second correlation coefficients; dividing the second correlation coefficient (c2) by the first correlation coefficient (c1) to obtain a correlation coefficient ratio; and using the correlation coefficient ratio as an estimate of the Doppler frequency in the wireless communication system.

Abstract: A method of TMCC information acquisition in an ISDB-T/TSB receiver comprises detecting coarse frequency offset in the receiver to identify bins that have TMCC information; and acquiring TMCC and symbol number information from the identified bins. The detecting process may be conducted using different methods and the acquiring process may be conducted using different methods. The TMCC information acquisition method saves memory space and provides enhanced performance by using coarse frequency offset to identify the bins that have TMCC information and obtaining the TMCC and symbol number information from the identified bins.

Abstract: A multi-chip antenna diversity architecture and method includes a first receiver chip that receives a first input signal from a first antenna. The first receiver chip includes a first tuner that amplifies the first input signal, a crystal operatively connected to a first crystal oscillator circuit, and a first crystal oscillator clock buffer that receives a clock signal from the first crystal oscillator circuit. A first demodulator demodulates the input signal received from the first tuner. A second receiver chip receives a second input signal from a second antenna. The second receiver chip includes a second crystal oscillator circuit, a second crystal oscillator clock buffer, a second tuner, and a second demodulator that receives diversity data from the first demodulator. The first crystal oscillator clock buffer drives the clock signal to the second crystal oscillator clock buffer, the second tuner, and the second demodulator of the second receiver chip.

Abstract: Address generation for interleaving in a wireless communication system includes at least one input generation module to generate at least one input signal. A first address generator module and a second address generator module generate a first output address for interleaving and a second output address for interleaving. A selector module selects an address for interleaving from the first and the second output address based on predetermined criteria. At least one input translation module is receives an input signal and translate the received input signal to generate a nominal input signal based on a value of the received input signal. An address generation module generates an address for interleaving based on the nominal input signal.

Abstract: A multi-chip antenna diversity architecture includes a first receiver chip including a first tuner, and a first demodulator directly connected to the tuner. The first demodulator demodulates the first input signal received from the first tuner. A first power sequencer that controls the first receiver chip, and a first chip ID including a voltage source VSS that indicates the first receiver chip as a slave chip. A second receiver chip includes a second tuner, and a second demodulator directly connected to the second tuner. The second demodulator demodulates the second input signal received from the second tuner. A second diversity combiner directly connected to the second demodulator. A second chip ID includes a voltage source VDD that indicates the second receiver chip as a master chip. A Diversity State Machine (DSM) controls an operating state of the first receiver chip and the second receiver chip that are structurally identical.

Abstract: A radio frequency wide band amplifier having a noise that does not exceed a threshold value, and a linearity better than a threshold value. The radio frequency wide band amplifier architecture includes a first stage amplifier and a second stage amplifier. The second stage amplifier includes an input source resistor (Rin) that receives an input voltage signal, a feedback resistor (Rfb) directly connected to the input source resistor, a p-type metal-oxide-semiconductor (PMOS) transistor directly connected to the input source resistor. The PMOS transistor receives an output from the input source resistor. A n-type metal-oxide-semiconductor (NMOS) transistor directly connected to the input source resistor. The NMOS transistor receives an output from the input source resistor. A lumped output resistor (Rout) that receives an output from the feedback resistor, the PMOS transistor, and the NMOS transistor. A terminal of the lumped output impedance is connected to ground.

Abstract: A system and method for increasing the throughput of a RS decoder in MediaFLO™ receivers. A MAC de-interleaver RAM architecture allowing operation of parallel RS decoders comprises of four equal portioned memory banks, a codeword buffer for data correction, and a higher bit width RAM. The method of increasing throughput of RS decoder by minimizing RAM access and clock frequency includes increasing the bit width of the de-interleaver RAM, using parallel RS decoder cores for decoding received data, partitioning a 4-bank RAM and ECB allocation scheme, and correcting the data using intermediate buffers. The architecture enables on-chip implementation of the MAC de-interleaver RAM and RS decoders with reduced power consumption and provide higher RS decoder throughput.

Abstract: Address generation for interleaving in a wireless communication system includes at least one input generation module to generate at least one input signal. A first address generator module and a second address generator module generate a first output address for interleaving and a second output address for interleaving. A selector module selects an address for interleaving from the first and the second output address based on predetermined criteria. At least one input translation module is receives an input signal and translate the received input signal to generate a nominal input signal based on a value of the received input signal. An address generation module generates an address for interleaving based on the nominal input signal.