Patents Assigned to Nippon Motorola Ltd.
  • Patent number: 6176373
    Abstract: An embossed carrier tape capable of accurately accomplishing an automatic inspection of leads or the like of an electronic component by means of a camera. The carrier tape is formed with a plurality of receiving recesses in which electronic components are to be received, respectively. The receiving recesses are each formed at a lower portion of each of side surfaces thereof opposite to leads of the electronic component with an inclined surface. Such construction results in the leads being abutted against the inclined surface, to thereby be subjected to positional regulation if the electronic component is undesirably moved during inspection thereof. This permits a reflected image of the leads from the side surface of the receiving recess to be substantially separated from a directly-viewed image thereof during an inspection of the electronic component by image processing using a camera, to thereby ensure accurate judgment of any defect of the electronic component, such as bending of the leads or the like.
    Type: Grant
    Filed: February 17, 1998
    Date of Patent: January 23, 2001
    Assignees: Shin-Etsu Polymer Co., Ltd., Nippon Motorola Ltd.
    Inventors: Hiroshi Kato, Tomoyasu Kato, Yasuyuki Takao, Hiroshi Kase
  • Patent number: 5493197
    Abstract: Circuit groups for preventing a battery from being deteriorated in efficiency due to a charging and discharging of each of secondary batteries is incorporated in a battery protection circuit for protecting a plurality of batteries connected in series to thereby extend a life of the battery. The battery protection circuit incorporates therein power down means for extending a time in which a voltage of a remaining capacity becomes 0V as much as possible by causing a current to flow only in the minimum circuit when the battery is overdischarged. Also, when a trouble such as a momentary overcurrent or the like is detected, the circuit can be prevented from set in the power down mode.
    Type: Grant
    Filed: September 15, 1993
    Date of Patent: February 20, 1996
    Assignees: Sony Corporation, Nippon Motorola Ltd.
    Inventors: Yasuhito Eguchi, Kanji Murano, Akira Sanpei, Hajime Tamiya
  • Patent number: 5130635
    Abstract: This invention relates to a bias current control circuit which drives a power MOS transistor. Since the power MOS transistor has a large capacitance which is formed between a gate and a channel, it is needed to provide a circuit which is able to sufficiently supply a drive current to the gate. Such a circuit increases a consumption current because the circuit has to always flow the current to drive the gate. This invention provides a circuit which cut the consumption current in the circuit when the transistor is not driven, and increases a consumption current in the circuit in order to keep a gate current when the transistor is driven.
    Type: Grant
    Filed: August 19, 1991
    Date of Patent: July 14, 1992
    Assignee: Nippon Motorola Ltd.
    Inventor: Kiyoshi Kase
  • Patent number: 5057999
    Abstract: A microprocessor including a CPU, an instruction memory (ROM) with a sequencer in the CPU that sends out a fetch signal for an instruction, and an address decoder that decodes the fetch signal and sends a signal to the ROM allowing the fetch signal to fetch an instruction if the address is correct.
    Type: Grant
    Filed: June 26, 1989
    Date of Patent: October 15, 1991
    Assignee: Nippon Motorola, Ltd.
    Inventors: Kiyoshi Kase, Minoru Suzuki
  • Patent number: 4602224
    Abstract: A circuit having an effective output capacitance the value of which can be varied over a predetermined range of values includes first and second differential amplifiers. The differential inputs of the second differential amplifier are connected to the differential outputs of the first differential amplifier, the latter of which receives a variable control signal. The second differential amplifier includes a pair of transistors the emitters of which are AC coupled to ground. A capacitor is coupled between the base and collector of one of the pair of transistors, the collector of which is coupled to the output of the circuit. A diode is AC coupled between the base and ground of the one transistor whereby the impedance thereof is varied in direct relationship to the conduction of the one transistor in response to the control signal thereby causing the value of the output capacitance of the circuit to be varied.
    Type: Grant
    Filed: December 20, 1984
    Date of Patent: July 22, 1986
    Assignee: Nippon Motorola Ltd.
    Inventors: Sohei Arimoto, Hitoshi Miyashita