Patents Assigned to North American Philips Corp.
  • Patent number: 5045918
    Abstract: A semiconductor device contains a stress-relief layer (46) having a glass transition temperature of 25.degree. C. or less. The layer generally lies above an electrical interconnection system (12) in the device but does not overlie bond pad areas. This substantially alleviates thermally induced stress that could otherwise damage electronic components in the device while simultaneously allowing the maximum stress on electrical conductors (32 and 34) that protrude from the external package coating (48) to occur at bonding areas which can tolerate the stress. The layer preferably is a silicone polymer consisting of exposed photosensitive material.
    Type: Grant
    Filed: April 4, 1990
    Date of Patent: September 3, 1991
    Assignee: North American Philips Corp.
    Inventors: Myron R. Cagan, Douglas F. Ridley, Daniel J. Belton
  • Patent number: 5030912
    Abstract: Apparatus and methodology for mapping the superconductive properties of a sample of superconducting material. The material is cooled so that it is a mixed state and an alternating magnetic field is induced in a portion of the sample to be tested. The harmonic component of the induced alternating magnetic response is measured at a location proximate to the point of induction. As the inducing and measuring devices are displaced relative to the sample the measured amplitude of the harmonic component is stored in suitable storage means as a function of location in the sample. Thus, a map of the superconducting properties of the sample may be generated.
    Type: Grant
    Filed: December 21, 1989
    Date of Patent: July 9, 1991
    Assignee: North American Philips Corp.
    Inventors: Samuel P. Herko, Rameshwar N. Bhargava, Avner A. Shaulov
  • Patent number: 5023482
    Abstract: An ISL clamped NPN transistor and a PNP interface transistor are merged together in a single semiconductive isolation island. The two transistors are laterally separated from each other along a semiconductive surface of the island, which also includes one or more metallic elements forming individual Schottky barrier contact diodes with the semiconductive surface. The PNP transistor provides translation between an ISL logic gate and a TTL logic gate. One of the Schottky diodes may be used in combination with the NPN transistor as an active pulldown for an output transistor of the TTL logic gate.
    Type: Grant
    Filed: May 13, 1985
    Date of Patent: June 11, 1991
    Assignee: North American Philips Corp.
    Inventor: Joseph T. Bellavance
  • Patent number: 5021358
    Abstract: A method of fabricating a CMOS-type structure entails forming a pair of conductive portions (68 and 70) on a pair of dielectric portions (72 and 74) lying on monocrystalline silicon (60). N-type dopant-containing ions are implanted into the silicon to form a pair of doped regions (78/82) separated by p-type material under one of the dielectric portions. Boron dopant-containing ions are similarly implanted to form a pair of doped regions (84) separated by n-type material under the other dielectric portion. A sacrificial oxidation is performed by oxidizing surface material of each conductive portion and each doped region and then removing at least part of the so oxidized material (86) down to the underlying silicon. Tungsten (88 and 90) is deposited on the exposed silicon after which a patterned electrical conductor is provided over the tungsten. Use of the sacrificial oxidation substantially reduces tunnel formation during the tungsten deposition.
    Type: Grant
    Filed: November 23, 1988
    Date of Patent: June 4, 1991
    Assignee: North American Philips Corp. Signetics Division
    Inventors: Janet M. Flanner, Michelangelo Delfino
  • Patent number: 5015604
    Abstract: The size of a fusible link (22C.sub.F) created from part of a metal layer (22) is controlled by an oxidation performed in a deposition chamber that is also used for depositing a dielectric layer (30) over the fuse structure. The metal layer serves as a diffusion barrier between semiconductor material (14 and 16) and another metal layer (24).
    Type: Grant
    Filed: August 18, 1989
    Date of Patent: May 14, 1991
    Assignee: North American Philips Corp., Signetics Division
    Inventors: Sheldon C. P. Lim, Julie W. Hellstrom, Ting P. Yen
  • Patent number: 5008740
    Abstract: Apparatus and methods for remodulating digital luminance and color difference components for display as PIP information, or together with other composite video components for multi-PIP and test pattern applications are disclosed. A digital encoder is used for conducting a digital quadrature modulation on the color difference components and for digitally adding the luminance signal thereto prior to the converting of the remodulated information into an analog format. Preferably, the digital video information output by the encoder is in the form Y1+(R-Y)1, Y1 +(B-Y)1, Y2-(R-Y)1, Y2-(B-Y)1, Y3+(R-Y)2. Y3+(b-Y)2, Y4 -(R-Y)2, . . . , where Y is the luminance component, R-Y and B-Y are color difference components, and where the numbers index received samples of the video components with the luminance component being sampled at twice the frequency of the color difference components.
    Type: Grant
    Filed: April 14, 1989
    Date of Patent: April 16, 1991
    Assignee: North American Philips Corp.
    Inventors: Larry G. Phillips, Edwin R. Meyer, David C. Greene
  • Patent number: 5006476
    Abstract: In a transistor fabrication process, the use of a three-step base doping technique enables the characteristics of a vertical bipolar transistor to be controllably reproduced at highly optimal values from run to run. Insulating spacers (52A) are employed in forming a self-aligned base contact zone (58B). A shallow emitter (46) is created by outdiffusion from a patterned non-monocrystalline semiconductor layer (38A) that serves as the emitter contact. The fabrication process is compatible with the largely simultaneous manufacture of an insulated-gate field-effect transistor of the lightly doped drain type.
    Type: Grant
    Filed: November 20, 1989
    Date of Patent: April 9, 1991
    Assignee: North American Philips Corp., Signetics Division
    Inventors: Jan L. De Jong, Jacob G. DeGroot
  • Patent number: 5004726
    Abstract: Apparatus and methodology for the rapid and inexpensive characterization of superconducting materials. The method and apparatus induces an alternating magnetic field in the sample to be tested. If the material is a superconductor odd harmonics are generated in the alternating magnetic response of the material near the transition temperature. The superconducting transitions are manifested by a peak or peaks in the odd harmonic components of the alternating magnetic response as a function of temperature. The peaks of the harmonic components are detected to indicate the presence and number of superconducting transitions.
    Type: Grant
    Filed: July 14, 1989
    Date of Patent: April 2, 1991
    Assignee: North American Philips Corp.
    Inventors: Avner A. Shaulov, Samuel P. Herko, Donald R. Dorman, Rameshwar N. Bhargava
  • Patent number: 5002360
    Abstract: An actively phase matched waveguide structure suitable for use as a frequency doubling device is described. The device includes a non-linear optical waveguide and phase matching of the waveguide is controlled by an electrically operated light modulator which is spaced apart from the waveguide. The modulator includes one or more electrodes disposed on a substrate and an elastomeric transparent gel which has a metallic coating on its upper surface. Application of a voltage between the metallic upper surface and the electrodes causes a deformation in the gel which alters the gap between the upper surface of gel and thus provides phase matching.
    Type: Grant
    Filed: December 20, 1989
    Date of Patent: March 26, 1991
    Assignee: North American Philips Corp.
    Inventors: Sel B. Colak, Efim Goldburt
  • Patent number: 4999586
    Abstract: A wideband amplifier is configured to allow sophisticated low voltage signal processing in a low-cost, high frequency integrated circuit driver. The integrated circuit driver provides output currents to drive high voltage discrete power transistors in such a way as to achieve maximum frequency response from the low-cost discrete transistors. The discrete power transistors in turn provide an output voltage suitable for driving, for example, a CRT display. The transconductance amplifiers, video processing circuitry, current multipliers, and summers are formed in an integrated circuit device utilizing readily available processing and circuit design techniques, and a relatively small number of discrete low power components, including pull-up and pull-down transistors which are chosen to have a fairly high frequency of unity current gain (F.sub.t), yet which are readily available at a very low cost.
    Type: Grant
    Filed: May 26, 1988
    Date of Patent: March 12, 1991
    Assignees: North American Philips Corp, Hewlett-Packard Co.
    Inventors: Robert G. Meyer, Jeffrey D. Scotten
  • Patent number: 4992703
    Abstract: A metal halide high intensity discharge lamp having an arc tube assembly including a pair of discharge electrodes and a pair of starting electrodes. Each starting electrode is adjacent a respective discharge electrode. During starting, the lamp makes the glow discharge to arc discharge transition in a substantially shorter time than a lamp with a single starting electrode, and exhibits a substantially improved lumen maintenance.
    Type: Grant
    Filed: January 23, 1990
    Date of Patent: February 12, 1991
    Assignee: North American Philips Corp.
    Inventor: Raghu Ramaiah
  • Patent number: 4990464
    Abstract: An improved technique for forming silicon-on insulator films for use in integrated circuits. The technique provides an improved encapsulation layer to enable in a reproducible way the zone melt recrystallization of such films. The encapsulation layer consists of a first layer of a doped SiO.sub.2 (silicate glass) on which a further layer of Si.sub.3 N.sub.4 is deposited. The doped SiO.sub.2 forms a fusible glassy material which is rendered semi-liquid and flows at the temperatures used in recrystallization. The softening of the encapsulation material accommodates volume expansion and eliminates the biaxial stresses in the layered structure. The Si.sub.3 N.sub.4 layer adds mechanical strength to the SiO.sub.2 layer and improves the wetting angle.
    Type: Grant
    Filed: December 30, 1988
    Date of Patent: February 5, 1991
    Assignee: North American Philips Corp.
    Inventors: Helmut Baumgart, Andre Martinez
  • Patent number: 4989058
    Abstract: A lateral insulated gate transistor includes both a surface-adjoining drain region and a surface-adjoining anode region in an epitaxial surface layer. An anode-drain electrode is connected to the anode region and coupled to the drain region. In one embodiment of the device, the drain and anode regions are in direct contact, and the anode-drain electrode directly contacts both regions. In a second embodiment, the anode region is provided in a high-doped surface-adjoining region rather than in direct contact with the drain region, and the anode-drain electrode is coupled to the drain region through a resistive element. A third embodiment employs a Schottky contact connected to the anode-drain electrode. Lateral isolated gate rectifiers in accordance with the invention offer the advantages of low "on" resistance, high breakdown voltage and fast switching characteristics.
    Type: Grant
    Filed: November 22, 1988
    Date of Patent: January 29, 1991
    Assignee: North American Philips Corp.
    Inventors: Sel Colak, Valdimir Rumennik
  • Patent number: 4987099
    Abstract: A method of making planarized metallization on a semiconductor substrate employing selective deposition.
    Type: Grant
    Filed: December 29, 1989
    Date of Patent: January 22, 1991
    Assignee: North American Philips Corp.
    Inventor: Janet Flanner
  • Patent number: 4977346
    Abstract: A discharge lamp comprises an HPS discharge device within an outer envelope filled with inert gas. A normally nonconductive spark gap device within the outer envelope is connected across conductors used to apply a voltage to the HPS discharge device. The spark gap breaks down when the applied voltage exceeds a certain value to prevent breakdown through the inert gas within the outer envelope.
    Type: Grant
    Filed: September 28, 1989
    Date of Patent: December 11, 1990
    Assignee: North American Philips Corp.
    Inventors: Ray G. Gibson, Joseph Droho
  • Patent number: 4977378
    Abstract: A differential amplifier contains first and second differential portions (20 and 22) that operate together to achieve rail-to-rail input amplification capability. A main current supply (6) provides a main supply conduit (I.sub.L) for the two differential portions. The circuit transconductance is controlled in a desired manner with a control amplifier (AN) suitably coupled to the differential portions and main current supply. A current-steering circuit typically formed with a pair of voltage clamps (30 and 32) enables a pair of level-shift current supplies (16 and 18) in the second differential portion to remain conductive as the input common-mode voltage traverses the entire supply voltage range. Consequently, the differential amplifier achieves a very fast response to changes in the input voltage difference irrespective of the value of the input commond-mode voltage.
    Type: Grant
    Filed: September 8, 1989
    Date of Patent: December 11, 1990
    Assignee: North American Philips Corp.
    Inventor: John P. Tero
  • Patent number: 4976809
    Abstract: Aluminum alloy polycrystalline conductors having reduced electro-migration tendencies are formed in a semiconductor device by applying a thin film of aluminum or aluminum alloy to an array of shallow holes provided in a dielectric layer the array being patterned according to a desired interconnection pattern. A thin film of aluminum or aluminum alloy is then scanned with a laser beam sufficient to melt the film and cause it to planarize. An oriented crystal structure is formed with grain boundaries being aligned orthogonally to the rows and column of the hole pattern. A photoresist mask is then aligned with the resultant crystal structure in a manner such that boundaries extend substantially only in a direction across the width of the desired conductor lines. The aluminum which is present in the crystal structure outside the desired conductor line is then removed by plasma etching through the mask.
    Type: Grant
    Filed: December 18, 1989
    Date of Patent: December 11, 1990
    Assignee: North American Philips Corp, Signetics Division
    Inventor: Eliot K. Broadbent
  • Patent number: D317134
    Type: Grant
    Filed: July 12, 1989
    Date of Patent: May 28, 1991
    Assignee: North American Philips Corp.
    Inventor: Stephen A. Francis
  • Patent number: D319121
    Type: Grant
    Filed: December 21, 1989
    Date of Patent: August 13, 1991
    Assignee: North American Philips Corp.
    Inventor: Ronald L. Muller
  • Patent number: D319167
    Type: Grant
    Filed: June 29, 1988
    Date of Patent: August 20, 1991
    Assignee: North American Philips Corp.
    Inventors: Duane D. Adams, Masao Tsuji