Abstract: A video processor is configured to perform the following steps: receiving a series of input frames; calculating a buffer stage value according to the series of input frames, wherein the buffer stage value corresponds to a status of the input frames stored in a frame buffer of the video processor; and selecting a frame set from the input frames stored in the frame buffer for generating an interpolated frame as an output frame to be output by the video processor according to the buffer stage value.

Abstract: A driving circuit includes a first driving signal generator, a first voltage conversion circuit and a first switch. The first driving signal generator generates a first driving signal according a first input signal, wherein the first driving signal is a pulse width modulated signal. The first voltage conversion circuit is coupled between the first driving signal generator and a control terminal of a first power transistor, converts the first driving signal to an output driving signal by charges a capacitor and discharges the capacitor, wherein the output driving signal is output to the control terminal of the first power transistor. The first switch is couple with the first power transistor in series, and is controlled by a control signal to be turned-on or cut-off.

Abstract: A signal transmitter includes a plurality of driver slices. Each of the driver slices includes a driving circuit, a plurality of first transistors, and a plurality of second transistors. The driving circuit receives an input signal and outputting an output signal. The first transistors provide a first impedance according to signals on gate terminals of the first transistors. The second transistors provide a second impedance according to signals on gate terminals of the second transistors. Each of the gate terminals of the first transistors and the second transistors is selectively coupled to a bias voltage which controls the corresponding first transistor or second transistor to operate in a triode region, or coupled to a predetermined voltage which controls the corresponding first transistor or second transistor to behave as a switch.

Abstract: A driving circuit configured to drive a touch display panel is provided. The driving circuit includes a signal generating circuit and a sensor driving circuit. The signal generating circuit is configurable to be coupled to gate lines of the touch display panel via a gate control circuit. The signal generating circuit modulates a plurality of voltage signals on a first driving signal and a second driving signal, and provides the modulated first driving signal and the modulated second driving signal to the gate control circuit to drive the gate lines during a sensing period. The sensor driving circuit is configurable to be coupled to sensor pads of the touch display panel. The sensor driving circuit modulates the voltage signals on a third driving signal, and drives the sensor pads with the modulated third driving signal during the sensing period. A method for driving a touch display panel is also provided.

Abstract: A timing control device for the display panel includes a control circuit. The control circuit is configured to generate a plurality of gate scanning control signals and a data transmission control signal. In response to that a display refresh rate changes from a first frequency to a second frequency, the control circuit adjusts the plurality of gate scanning control signals to generate a plurality of adjusted gate scanning control signals, or adjusts the data transmission control signal to generate an adjusted data transmission control signal, for driving a display panel under the second frequency as the display refresh rate.

Abstract: A pixel circuit of a display panel includes a driving transistor, first to fifth transistors, and a light emitting device. The driving transistor includes a first terminal, a second terminal and a gate terminal. The first transistor is coupled between a power supply terminal and the first terminal of the driving transistor. The second transistor is coupled between the first terminal of the driving transistor and the gate terminal of the driving transistor. The third transistor is coupled between the second terminal of the driving transistor and the gate terminal of the driving transistor. The fourth transistor is coupled between a data input terminal and the second terminal of the driving transistor. The fifth transistor is coupled to the second terminal of the driving transistor. The light emitting device is coupled between the fifth transistor and a reference voltage terminal.

Abstract: A method of backlight control for a display panel is provided. The display panel is configured to display with a variable refresh rate in a plurality of frame periods each having a fixed period and a variable period. The method includes steps of: generating a first backlight control signal in the fixed period of a frame period; determining whether a liquid crystal (LC) transition time corresponding to the frame period ends before an end time of the variable period of the frame period; generating a second backlight control signal in the variable period of the frame period when the LC transition time ends before the end time of the variable period of the frame period; and generating a compensation backlight control signal in a next frame period according to a backlight duty cycle of the frame period.

Abstract: The present disclosure provides a method for a display driver system and a display driver system.

Abstract: An electronic circuit adapted to process fingerprint data from a panel including touch sensors and fingerprint sensors is provided. The electronic circuit includes a first circuit, a second circuit and a control circuit. The first circuit is configured to receive touch sensing signals from the touch sensors. The second circuit is configured to receive fingerprint sensing signals corresponding to at least one fingerprint imprint from the fingerprint sensors via fingerprint sensing lines. The control circuit is configured to determine a fingerprint touch area according to the touch sensing signals, and select a subset of the fingerprint sensing lines to form a fingerprint sensing zone adapted for a fingerprint sensing operation and including at least one boundary based on the determined fingerprint touch area. The subset of fingerprint sensing lines is selected based on the at least one boundary of the fingerprint sensing zone.

Abstract: A display apparatus and an fingerprint sensing method thereof are provided. A display panel of the display apparatus has a pixel circuit array, an in-display touch sensor array, and an in-display fingerprint sensor array. A driving circuit drives the in-display fingerprint sensor array to read a fingerprint image. A current display frame period is divided into a plurality of unit periods, each of the unit periods includes at least one fingerprint sensing period and one or both of a display driving period and a touch sensing period. The driving circuit resets a current fingerprint sensor in the in-display fingerprint sensor array during a first fingerprint sensing period among these fingerprint sensing periods of the first display frame period. The driving circuit reads a sensing result of the current fingerprint sensor during a second fingerprint sensing period succeeding to the first fingerprint sensing period.

Abstract: The disclosure is directed to a timing controller having a mechanism for frame synchronization, a display panel having the timing controller thereof, and a display system having the timing controller thereof. According to an aspect of the disclosure, the disclosure provides an integrated circuit which includes a timing controller to transmit a first TE signal to an application processor and receive a first image frame from the application processor after the application processor receives the first TE signal, and a control circuit to generate a first sync signal when the timing controller receives the first image frame, wherein when the application processor receives a second TE signal and the application processor is not ready to transmit a second image frame to the timing controller, the control circuit delays a first waiting period to generate a second sync signal.

Abstract: A driving method, for a controller in a display apparatus, is disclosed. The display apparatus includes LED strings, scan transistors, current regulators and a power converter. The driving method includes following steps. LED cathode voltages are detected on nodes between the LED strings and the current regulators. When a first LED cathode voltage corresponding to a first scanning channel is equal to a minimal operable voltage of the current regulators and a second LED cathode voltage corresponding to a second scanning channel exceeds the minimal operable voltage of the current regulators, a voltage drop over one corresponding scan transistor is increased on the second scanning channel.

Abstract: A driving method, for a controller in a display apparatus, is disclosed. The display apparatus includes LED strings, scan transistors, current regulators and a power converter. The driving method includes following steps. LED cathode voltages are detected on nodes between the LED strings and the current regulators. When a first LED cathode voltage is equal to a minimal operable voltage of the current regulators and a second LED cathode voltage exceeds the minimal operable voltage of the current regulators, a driving current flowing through the second data channel is adjusted by increasing a pulse current level of the driving current and reducing a duty cycle ratio of the driving current flowing through the second data channel.

Abstract: The disclosure is directed to a timing controller having a mechanism for frame synchronization, a display panel having the timing controller thereof, and a display system having the timing controller thereof. According to an aspect of the disclosure, the disclosure provides an integrated circuit which includes a timing controller to transmit a first TE signal to an application processor and receive a first image frame from the application processor after the application processor receives the first TE signal, and a control circuit to generate a first sync signal when the timing controller receives the first image frame, wherein when the application processor receives a second TE signal and the application processor is not ready to transmit a second image frame to the timing controller, the control circuit delays a first waiting period to generate a second sync signal.

Abstract: The disclosure provides a pixel circuit of a display panel. The pixel circuit includes a light-emitting element, a transistor, a first capacitor, a second capacitor, a first switch, and a second switch. The transistor is disposed in a driving current path to adjust the driving current of the light-emitting element. A first terminal of the first switch is coupled to a data line. A second terminal of the first switch is coupled to a first terminal of the first capacitor and a control terminal of the transistor. A first terminal of the second switch is coupled to a second terminal of the first capacitor and a first terminal of the second capacitor. A second terminal of the second switch is coupled to a first terminal of the transistor. A second terminal of the second capacitor is coupled to a reference voltage.

Abstract: A driving device, an operation method thereof, and a display apparatus are disclosed. The driving device is configured to drive a display panel. The driving device divides an image frame period into a plurality of sub-frame periods. A target pixel circuit in the display panel corresponds to target pixel data comprising at least one bit. Each bit in the target pixel data corresponds to at least one corresponding sub-frame period among the sub-frame periods. Different bits in the target pixel data correspond to different sub-frame periods among the sub-frame periods. According to a current bit in the target pixel data, the driving device determines whether to light up the target pixel circuit during the at least one corresponding sub-frame period corresponding to the current bit.

Abstract: A source driver includes a first DAC for driving a first-color subpixel and a second DAC for driving a second-color subpixel. Each DAC is configured to output at least one output voltage according to an N-bit data code, and includes a plurality of sub-DACs, an interpolation circuit and a switch circuit. Each sub-DAC receives m bits of the N-bit data code and generates a set of intermediate voltages accordingly. The interpolation circuit performs an interpolation on a selected set of intermediate voltages according to k bits of the N-bit data code and at least one interpolation control signal, to generate the output voltage. The switch circuit electrically connects the interpolation circuit and a selected sub-DAC which outputs the selected set of intermediate voltages. The interpolation circuit of the first DAC and the interpolation circuit of the second DAC respectively perform the interpolation according to different numbers of interpolation bits.

Abstract: A voltage regulating circuit includes a low-dropout regulator, configured to provide a driving voltage to drive a loading circuit and receive a first detection voltage from a first feedback terminal; and a reference voltage generating circuit, coupled to the low-dropout regulator, configured to receive a second detection voltage from a second feedback terminal. A voltage difference between the first feedback terminal and the second feedback terminal is clamped according to the first detection voltage and the second detection voltage.

Abstract: The disclosure provides a digital-to-analog conversion device and an operation method thereof. The digital-to-analog conversion device includes a digital-to-analog conversion circuit and a slew rate enhancement circuit. The digital-to-analog conversion circuit is configured to convert a digital code into an analog voltage. An output terminal of the digital-to-analog conversion circuit outputs the analog voltage to a load circuit. A control terminal of the slew rate enhancement circuit is coupled to the digital-to-analog conversion circuit to receive a control voltage following the analog voltage. The slew rate enhancement circuit is coupled to the output terminal of the digital-to-analog conversion circuit. The slew rate enhancement circuit enhances the slew rate at the output terminal of the digital-to-analog conversion circuit based on the control voltage.

Abstract: A data transmission system is utilized in a Mobile Industry Processor Interface (MIPI). A master device includes a control module for generating a control signal according to a feedback signal. A packet encoding module is coupled to the control module for encoding an original packet to be a transmission packet according to the original packet and the control signal to process a transmission operation. A slave device includes a packet decoding module for decoding, the transmission packet to be the original packet or a related display device signal corresponding to the original packet to a display device. A feedback module is coupled to the packet decoding module for generating the feedback signal to the control module of the master device according to a decoding condition of the control module, so as to switch a transmission mode of the transmission operation.