Abstract: Devices and methods for multilayer packages, antenna array feeds, test interface units, connectors, contactors, and large format substrates. The device comprising a 3D coaxial distribution network structure including a plurality of coaxial transmission lines separated by a first pitch at the input and a second, wider pitch at the output thereof.
Type:
Grant
Filed:
January 16, 2015
Date of Patent:
June 4, 2019
Assignee:
NUVOTRONICS, INC
Inventors:
Rick L. Thompson, Kenneth Vanhille, Anatoliy O. Boryssenko, Jean Marc Rollin
Abstract: Provided are coaxial transmission line microstructures formed by a sequential build process, and methods of forming such microstructures. The microstructures include a transition structure for transitioning between the coaxial transmission line and an electrical connector. The microstructures have particular applicability to devices for transmitting electromagnetic energy and other electronic signals.
Abstract: Provided are coaxial waveguide microstructures. The microstructures include a substrate and a coaxial waveguide disposed above the substrate. The coaxial waveguide includes: a center conductor; an outer conductor including one or more walls, spaced apart from and disposed around the center conductor; one or more dielectric support members for supporting the center conductor in contact with the center conductor and enclosed within the outer conductor; and a core volume between the center conductor and the outer conductor, wherein the core volume is under vacuum or in a gas state. Also provided are methods of forming coaxial waveguide microstructures by a sequential build process and hermetic packages which include a coaxial waveguide microstructure.
Abstract: Structures, materials, and methods to control the spread of a solder material or other flowable conductive material in electronic and/or electromagnetic devices are provided.
Abstract: Provided are integrated electronic components which include a waveguide microstructure formed by a sequential build process and an electronic device, and methods of forming such integrated electronic components. The microstructures have particular applicability to devices for transmitting electromagnetic energy and other electronic signals.
Abstract: The present invention relates to the fabrication of complicated electronic and/or mechanical structures and devices and components using homogeneous or heterogeneous 3D additive build processes. In particular the invention relates to selective metallization processes including electroless and/or electrolytic metallization.
Abstract: Substrate-free mechanical structural systems comprised of interconnected subsystems of electronic and/or electromechanical components are provided.
Type:
Grant
Filed:
March 14, 2016
Date of Patent:
February 6, 2018
Assignee:
NUVOTRONICS, INC
Inventors:
Ian Hovey, J. Robert Reid, David Sherrer, Will Stacy, Ken Vanhille
Abstract: An apparatus comprising a first power combiner/divider network and a second power combiner/divider network. The first power combiner/divider network splits a first electromagnetic signal into split signals that are connectable to signal processor(s). The second power combiner/divider network combines processed signals into a second electromagnetic signal. The apparatus includes a three-dimensional coaxial microstructure.
Type:
Grant
Filed:
July 28, 2016
Date of Patent:
December 12, 2017
Assignee:
NUVOTRONICS, INC
Inventors:
David Sherrer, Jean-Marc Rollin, Kenneth Vanhille, Marcus Oliver, Steven E. Huettner
Abstract: Provided are methods of forming sealed via structures. One method involves: (a) providing a semiconductor substrate having a first surface and a second surface opposite the first surface; (b) forming a layer on the first surface of the substrate; (c) etching a via hole through the substrate from the second surface to the layer, the via hole having a first perimeter at the first surface; (d) forming an aperture in the layer, wherein the aperture has a second perimeter within the first perimeter; and (e) providing a conductive structure for sealing the via structure. Also provided are sealed via structures, methods of detecting leakage in a sealed device package, sealed device packages, device packages having cooling structures, and methods of bonding a first component to a second component.
Abstract: Provided are methods of forming sealed via structures. One method involves: (a) providing a semiconductor substrate having a first surface and a second surface opposite the first surface; (b) forming a layer on the first surface of the substrate; (c) etching a via hole through the substrate from the second surface to the layer, the via hole having a first perimeter at the first surface; (d) forming an aperture in the layer, wherein the aperture has a second perimeter within the first perimeter; and (e) providing a conductive structure for sealing the via structure. Also provided are sealed via structures, methods of detecting leakage in a sealed device package, sealed device packages, device packages having cooling structures, and methods of bonding a first component to a second component.
Abstract: The present invention relates generally to digital elliptic filters, and more particularly, but not exclusively to multi-layer digital elliptic filters and methods for their fabrication.
Abstract: Connectors and interconnects for high power connectors which may operate at frequencies up to approximately 110 GHz and fabrication methods thereof are provided.