Abstract: An optical sensor unit, free from electrical noise, includes a sensor case which has both lateral sides having high frequency connectors mounted thereon, and a metallic plate mounted inside the case. The metallic plate has both ends connected to inner conductors of the high frequency connectors, and its upper surface having a current and a voltage sensor unit mounted thereon for measuring the high frequency current and voltage, respectively. The current sensor unit includes total-reflection mirrors and a current sensor, and the voltage sensor unit includes further total-reflection mirrors and a voltage sensor. The voltage sensor has its upper surface having an electrode provided thereon to be connected to the sensor case. The laser light from outside is input to the current and voltage sensor units over optical fibers. The signal light output from the current and voltage sensor units is taken outside on output optical fibers.

Abstract: A vertical synchronous signal detection circuit includes an analog-digital converter, an average calculation circuit and a compare circuit. The analog-digital converter receives a composite video signal and converts the video signal into a digital signal having a vertical synchronizing pulse. The average calculation circuit is coupled to receive the digital signal. The average calculation circuit calculates an average level of the vertical synchronizing pulse within a predetermined period. The compare circuit is connected to the average calculation circuit. The compare circuit compares a threshold level received thereto with the average level and outputs a synchronous detect signal when the average level falls below the threshold level.

Abstract: An LSI designing method using one or more functional blocks each containing two or more flip flops, includes the following: preparing a timing model which can be used under a first mode and a second mode; performing functional design of some functional elements each of which includes one or more functional blocks; carrying out logic composition with respect to the functional elements decided by the functional design using the timing model of the functional blocks under the first mode; performing a first timing analysis with respect to the functional elements on which logic composition was carried out using the timing model under the first mode; performing layout based on the result of the logic composition and the first timing analysis; and performing a second timing analysis after the layout using the timing model under the second mode.

Abstract: The present invention provides a method of manufacturing an ESD protection device with a gate electrode structure that reduces surge voltage applied to a gate insulating film and inhibits destruction of the gate insulating film. A method of manufacturing a semiconductor device includes steps of preparing a support substrate, forming a device region and a device-separation region on the support substrate, forming a gate insulating film in the device region, forming a first gate electrode on the gate insulating film, implanting a first impurity ion into the first gate electrode, and decreasing a first impurity ion concentration by implanting a second impurity ion with a polar character, which is opposite from that of the first impurity ion, into the first gate electrode.

Abstract: A method for producing a semiconductor device with an SOI substrate having a support substrate 1 and a semiconductor layer 3 that interpose a first insulating film 2 between them includes the following steps. An element region and an element-separation region 4 are formed in the semiconductor layer 3. A gate insulating film 5 is formed on the semiconductor layer 3. A gate electrode 6 is formed on the gate insulating film 5. A second insulating film 7 is formed. The gate insulating film 5 is removed. First thickness adjustment is performed. Ion implantation introducing low concentration impurities is performed on the thickness-adjusted semiconductor layers 3 and 8. A first sidewall portion 7a is formed on the side surfaces of the gate electrode 6. A second sidewall portion 10a is formed on the side surfaces of the first sidewall portion 7a.

Abstract: The present invention aims to be capable of properly measuring the cycle of an external signal even where a timer clock and a CPU clock are operated asynchronously.

Abstract: A method of controlling an input/output unit (general purpose input/output module) with a plurality of submodules (terminal parts) includes said following; arranging each of the submodules to store an address including a first address part and a second address part, and grouping the submodules according to the first address part; receiving an access address for designating the first address part; selecting a group of submodules storing the first address part that matches the access address; controlling data transmission/reception via the selected submodules according to the second address part stored in each of the selected submodules.

Abstract: A wireless communication device control method employing Adaptive Frequency Hopping that switches among a plurality of channels except for a channel subject to interference by interfering waves includes creating, setting, processing reception, restricting use and resetting use restriction. In the creating step, a hopping pattern is created by using available channels. In the setting step, channels used for the communication are set based on the hopping pattern. In the processing reception step, received signals on the channels are processed. In the restricting use step, use of the interfered carrier channel is restricted when interfering waves are detected in the channel after detection whether interfering waves exist. In the resetting use restriction step, the restriction on use of the restricted channel is reset when interfering waves are not detected in the channel by carrier-sensing in the channel during idle time where the wireless communication device does not perform communication.

Abstract: An evaluation chip is disclosed whose interrupt priority order can be changed freely. A plurality of interrupt priority order determining circuits 20-1 to 2-4 perform a logical operation on a plurality of signals S11 to S14 used for interrupt priority order modifying control that are applied from outside and a plurality of interrupt signals S31-1 to S31-4, and output interrupt modifying signals S24-1 to S24-4. A plurality of interrupt modules 30-1 to 30-4 perform a logical AND operation on the plurality of signals S24-1 to S24-4 and a plurality of interrupt request signals S15-1 to S15-4 that are applied from outside, and output the signals S31-1 to S31-4. An address generating circuit 40 encodes the plurality of signals S31-1 to S31-4 and generates interrupt vector addresses 40. A microcomputer core 50 executes interrupt instructions that have been fetched from an external program memory 100, based on the addresses S40.

Abstract: The present invention provides a method of manufacturing a semiconductor device that can inhibit deterioration of the ferroelectric film cased by hydrogen generated in a wiring layer. The method of manufacturing a semiconductor device includes steps of forming the ferroelectric capacitor by laminating first electrode 8, ferroelectric film 9, second electrode 10, covering the ferroelectric capacitor by insulating film 11, forming opening 13d that exposes the second electrode 10 on the insulating film 11, depositing or forming conductive hydrogen protective film 20, forming wiring layer 14 on the conductive hydrogen protective film 20, and patterning the wiring layer 14 and the conductive hydrogen protective layer 20 after forming the wiring layer 14.

Abstract: A method of manufacturing a semiconductor device includes: forming a transistor with first and second ends 3a and 3b of a main current path, and a control electrode 5, covering the transistor with a first insulating film 6, forming first through third openings that expose the first and second ends 3a and 3b and the control electrode 5, and burying or filling first to third conductive materials 7a-7c in the first to third openings respectively, forming the ferroelectric capacitor by laminating the first electrode 8, the ferroelectric film 9, and the second electrode 10, laminating the second insulating film 11 and the moisture diffusion protective film 12, forming the fourth opening 13c to expose the third conductive material 7c through the second insulating film 11 and the moisture diffusion protective film 12, and forming a first wiring layer 14c, which has electrical connection with the control electrode 5.

Abstract: A noise reduction circuit and method effectively reduce noise with a simple structure regardless of the partial content of an image while suppressing an increase in the capacity of the image memory used and process delays. The present invention forms noise-reduced data by utilizing a correlation between from the difference between a pixel subjected to noise reduction and data of a pixel that is shifted by a predetermined amount in a time direction and/or spatial direction, and forms a difference cause discriminating signal indicating whether the difference is due to a valid change of the image. The noise-reduced data and the difference cause discriminating signal are formed for a plurality of different correlations. Final noise-reduced video data are obtained by selecting a method for determining the final noise-reduced video data based on the difference cause discriminating signals, and accordingly selecting/combining the plurality of noise-reduced data.

Abstract: A semiconductor device capable of preventing the occurrence of stress in a field region, and to prevent dislocation, caused by the stress, in the active region is provided. A method for producing a semiconductor includes: forming an active island region (10) on or above an support substrate; forming a field region (20) surrounding a periphery of the active island region (10); forming an interstice portion (112) at boundary between the active island region (10) and the field region (20); subjecting the field region (20) to heat treatment to eject a residual matter to be evaporated after forming the interstice portion (112); and burying the interstice portion (112) by thermal oxidation.

Abstract: In a base station of a wireless telecommunications system for communicating with mobile terminals, a radiowave is received on a transmission channel and compared in field intensity with a threshold value. The threshold value is considered to be received while unused, in view of the receiver characteristics of the base station, and the base station selects a channel with the field intensity below the threshold value as an idle channel to form an idle channel list. To communicate with a mobile terminal, a channel is selected at random among the channels listed in the idle channel list. This makes it possible to reduce the probability that the same channel as that of a contiguous base station, will be selected and enables the channel selection to be achieved quickly and positively in the base station of the wireless telecommunications system sharing transmission channels of the same frequency band as that of contiguous base stations.

Abstract: A selective oxidation process includes conducting a former phase of an oxidation process employing a thick mask layer to produce an oxide layer having a thickness less than the finished thickness of a desired semiconductor device isolation insulator. Then the thickness of the mask layer is reduced and a latter phase of the oxidation process using the reducing thickness mask layer is performed to produce the desired semiconductor device isolation insulator having the ultimate thickness. The use of both a thick mask layer and a reduced thickness mask layer for various phases of the oxidation process limits both the growth of the bird's beak and the growth of crystalline defects in the bird's beak.

Abstract: A semiconductor memory device has memory cells for storing data, sense amplifiers for amplifying the stored data, and cache cells in which the amplified data can be placed for quick recall. The cache cells can continue to hold data during memory-cell refresh cycles, permitting the cached data to be accessed quickly afterward. The cache cells may be coupled to column data lines that can be disconnected from the sense amplifiers, enabling memory cells to be refreshed while cache access is in progress. Write buffers may be provided so that when cache data are replaced, the old cache data can be copied back to the memory cells while the new cache data are being accessed.

Abstract: A permanent magnet type stepping motor comprising first and second stator assemblies arranged coaxially about a longitudinal axis. Each assembly includes first and second ring-shaped stators made of magnetic material. The first ring-shaped stator has a central portion with an opening therein, an annular yoke surrounding the periphery of the central portion and a plurality of pole pieces distributed about the circumference of the opening and extending toward a plane transverse to the axis. The second ring-shaped stator has a central portion with an opening therein, an annular substantially planar yoke surrounding the periphery of the central portion and a plurality of pole pieces distributed about the circumference of the opening and extending away from the transverse plane so as to interleave with the pole pieces of the first stator. The central portion of the second stator protrudes from the plane of the yoke in a direction away from the transverse plane.

Abstract: An LED array printer includes an LED array print head (1) and a control circuit board (31) for controlling the LED array printer. A setting arrangement circuit (41) for setting the characteristics and specifications of the head is disposed in the head (1). setting data is read from the setting arrangement (41) and transferred to the control circuit board (31) in order to control the head (1).

Abstract: A power amplifying apparatus according to the present invention can provide a stable electric power output with wide range by controlling both of the output amplifier for amplifying the electric power and the pre-amplifier disposed at the front of the output amplifier. Furthermore, in order to avoid the disadvantage that a transmission spectrum is expanded because of no supply of a stable voltage to be supplied to the electric power amplifier, thereby producing a cross-talk, a stabilizing power source circuit is provided to stabilize the voltage between the power amplifier and the power source for supplying the voltage.

Abstract: A ribbon protector is used for protecting paper from contamination by an ink ribbon in a printer, where the protector is inserted between paper located between a platen and a printing head. The printing head facing the platen performs spacing movement for printing. Two connected plate-like elements are provided with through openings for passage of the pin of the printing head. Mutually engageable electroconductive elements are provided on the inner walls of the two plate-like elements, at least in the area where they are compressed by the tip of the printing head, and spacers which are made from resilient materials are located between the two plate-like elements.