Patents Assigned to Oki Electric Industry Co., Inc.
  • Patent number: 6459322
    Abstract: A level adjustment circuit of the present invention includes a MOS transistor for pulling up an output node, a first inverter for inputting an output data signal and outputting a gate control signal for controlling a gate electrode of the MOS transistor, and a second inverter connected to the MOS transistor between the first and second electrodes for imputing the first node obtained based on the output data signal, and outputting the output node.
    Type: Grant
    Filed: March 20, 2000
    Date of Patent: October 1, 2002
    Assignee: Oki Electric Industry Co. Inc.
    Inventor: Shizuo Cho
  • Patent number: 6262934
    Abstract: A memory circuit includes a memory cell array having word lines, bit lines and memory cells, and a word line reset circuit for applying an activation level to a word line that is selected, and for applying a lower level which is lower than a deactivation level to the word line when it is non-selected. The word line reset circuit includes a first driver for applying the activation level to the selected word line during a first selected period, a second driver for applying the deactivation level to the word line during a second select period after the first select period, and a third driver for applying the lower level to the word line during a period other than the first and second select periods.
    Type: Grant
    Filed: April 19, 2000
    Date of Patent: July 17, 2001
    Assignee: Oki Electric Industry Co., Inc.
    Inventor: Hidenori Uehara
  • Patent number: 6215917
    Abstract: An object is to realize optical signal transmitter-receiver module with high transmitting power and high receiving sensitivity at a low cost. The optical signal transmitter-receiver module 60 includes a planar lightwave circuit (PLC) 61 and a transmitter-receiver circuit. The PLC 61 is made up with a Si substrate 62, a laser diode (LD) 6 generating the optical signal Pt, and a photodiode (PD)7 receiving the optical signal Pr. Both LD 6 and PD 7 are arranged on the Si substrate 62. The LD6 is arranged such that its front face is located in the vicinity of an optical fiber 64. The LD 6 has an optical waveguide layer that is composed of an active layer generating the optical signal Pt and a clad layer functioning as a transparent layer to the optical signal Pr. The PD 7 is arranged such that its front face is located in the vicinity of the backside face of the LD 6 and receives the optical signal Pr having passed through the optical waveguide layer of the LD 6.
    Type: Grant
    Filed: April 26, 1999
    Date of Patent: April 10, 2001
    Assignee: Oki Electric Industry Co., Inc.
    Inventors: Atsushi Takahashi, Sigeru Takasaki, Yoshihiko Kobayashi
  • Patent number: 6163566
    Abstract: A spread spectrum communications system is provided for reducing the number of required matched filters to simplify the configuration associated with the reception. In a spread spectrum transmitter, a plurality of spread channel signals are synthesized by shifting their respective phases by a time sufficiently shorter than one symbol period. In a spread spectrum receiver, a plurality of spread code sequences are set one by one at a tap of a single matched filter in one symbol period in a time division manner to recover transmitted data.
    Type: Grant
    Filed: October 2, 1998
    Date of Patent: December 19, 2000
    Assignee: Oki Electric Industry Co., Inc.
    Inventor: Haruhiro Shiino
  • Patent number: 6061338
    Abstract: In a mobile communication system, a mobile station located in an area using an analog system receives information for synchronization from a base station situated in the above area. On moving from the area using an analog system to an area using a CDMA (Code Division Multiple Access) area, the mobile station acquires a pilot channel from a base station located at the CDMA area. For this purpose, the mobile station generates a phase set signal on the basis of the information received in the analog system area. The phase set signal resets an I-phase and a Q-phase spread code generator included in a serial search acquisition circuit for acquiring the pilot channel. As a result, spread codes output from the spread code generators are causes to coincide in phase with a spread code used to spread a signal being received over the pilot channel. This allows the mobile station to acquire the pilot channel in the CDMA system area in an extremely short period of time.
    Type: Grant
    Filed: March 25, 1997
    Date of Patent: May 9, 2000
    Assignee: Oki Electric Industry Co., Inc.
    Inventor: Waho O
  • Patent number: 6006303
    Abstract: A shared resource access priority encoding/decoding and arbitration scheme takes into account varying device requirements, including latency, bandwidth and throughput. These requirements are stored and are dynamically updated based on changing access demand conditions.
    Type: Grant
    Filed: August 28, 1997
    Date of Patent: December 21, 1999
    Assignee: OKI Electric Industry Co., Inc.
    Inventors: Michael J. Barnaby, Abe Mammen
  • Patent number: 5986788
    Abstract: To provide a microoptical system for free-space optical interconnection capable of relaxing the arrangement accuracy of a light source and a photodetector. A point light source and a photodetector are interconnected each other by first and second imaging lenses and focused Gaussian beams. In this case, the point light source, first imaging lens, second imaging lens, and photodetector are positioned so that the effective beam radius .omega..sub.2 of a focused Gaussian beam on the first interconnecting lens is larger than the effective beam radius .omega..sub.4 of a focused Gaussian beam on the second imaging lens.
    Type: Grant
    Filed: June 25, 1996
    Date of Patent: November 16, 1999
    Assignee: Oki Electric Industry Co., Inc.
    Inventors: Hironori Sasaki, Keisuke Shinozaki
  • Patent number: 5974040
    Abstract: There are provided a receiver and a transmitter-receiver in which an automatic gain control loop is promptly performed and even in the case of a modulated wave having information in its amplitude, wave distortion can be eliminated. A received signal is received by an antenna and is amplified by a power amplifier. The gain of the received signal is attenuated by a variable attenuator in accordance with an output voltage of a holding circuit. After the signal is converted to an intermediate-frequency signal and amplified through a common procedure and detected, a comparator compares an output signal of the detector and a reference voltage V.sub.ref, and obtains a signal indicating whether the output signal exceeds a reference voltage or a differential voltage therebetween. When the output signal or the differential voltage is brought to a positive level, a timing signal generating section generates a timing signal T.sub.m, and the holding circuit holds a detection signal.
    Type: Grant
    Filed: March 20, 1997
    Date of Patent: October 26, 1999
    Assignee: OKI Electric Industry Co., Inc.
    Inventor: Kouichi Kimura
  • Patent number: 5734151
    Abstract: A portable smart card reader for reading and displaying information stored on a smart card comprising a thin housing having an upper surface and a lower surface, a flexible cover affixed to and spaced from the lower surface a plurality of electrical contacts affixed to the lower surface, a reader circuit contained within the housing and connected to the electrical contacts and a display on the housing connected to the reader circuit. A smart card can be placed against the contacts and the circuit can read information stored on the smart card and display the information. Since the reader has no slot with a rigid lower portion, the reader is thin and more easily carried.
    Type: Grant
    Filed: March 15, 1996
    Date of Patent: March 31, 1998
    Assignee: Oki Electric Industry Co., Inc.
    Inventor: Gerald W. Vandenengel
  • Patent number: 5234844
    Abstract: A bi-polar transistor structure in a superhigh speed logic integrated circuit, and a process for producing the same are disclosed. The transistor has a substantially coaxial symmetric structure. Single crystal active layers as base and collector regions have peripheries surrounded wholly or partially by respective polycrystalline electrode layers. The polysilicon electrodes have lateral portions and downward depending portions that connect to single crystal layers. The polycrystalline electrode layers are separated from each other by insulation. One process for producing the structure uses only thin film forming techniques and etching techniques to dispose the active layers, an emitter electrode layer, parts of the other electrode layers and parts of the insulating layers inside a recess formed in an insulating layer formed on a substrate. Another process uses a photoetching technique by which polycrystalline layers for base and collector electrodes are patterned.
    Type: Grant
    Filed: July 23, 1991
    Date of Patent: August 10, 1993
    Assignee: Oki Electric Industry Co., Inc.
    Inventor: Yoshihisa Okita
  • Patent number: 4984215
    Abstract: In a semiconductor memory device comprising a memory cell matrix having memory cells connected to word lines and bit lines and arranged in rows and columns, an initialize circuit is responsive to an initialize signal to set all the bit lines to predefined one of High level and Low level, and to raise the word line selected by the output of a row address decoder and then to raise other word lines sequentially. As a result, the memory cells are initialized sequentially word line by word line.
    Type: Grant
    Filed: June 29, 1989
    Date of Patent: January 8, 1991
    Assignee: Oki Electric Industry Co., Inc.
    Inventor: Yuki Ushida
  • Patent number: 4974045
    Abstract: A bi-polar transistor structure in a superhigh speed logic integrated circuit, and a process for producing the same are disclosed. The transistor has a substantially coaxial symmetric structure. Single crystal active layers as base and collector regions have peripheries surrounded wholly or partially by respective polycrystalline electrode layers. The polysilicon electrodes have lateral portions and downward depending portions that connect to single crystal layers. The polycrystalline electrode layers are separated from each other by insulation. One process for producing the structure uses only thin film forming techniques and etching techniques to dispose the active layers, an emitter electrode layer, parts of the other electrode layers and parts of the insulating layers inside a recess formed in an insulating layer formed on a substrate. Another process uses a photoetching technique by which polycrystalline layers for base and collector electrodes are patterned.
    Type: Grant
    Filed: March 3, 1989
    Date of Patent: November 27, 1990
    Assignee: Oki Electric Industry Co., Inc.
    Inventor: Yoshihisa Okita
  • Patent number: 4768003
    Abstract: A microwave filter comprising a rectangular ceramics block (30) having a plurality of elongated parallel holes (31-36) extending from the top surface to the bottom surface thereof. The holes are plated with conductive layers (37, 38), and flat conductive areas (39-44) coupled with the layers (37, 38) spatially disposed on the top surface of the dielectric block (30) surround opening ends of the holes (31-36). An input terminal and an output terminal are provided adjacent to the conductive areas (39, 44) at both the extreme sides of the dielectric block (30).
    Type: Grant
    Filed: July 17, 1987
    Date of Patent: August 30, 1988
    Assignee: OKI Electric Industry Co., Inc.
    Inventors: Izumi Kawakami, Tomokazu Komazaki, Katuhiko Gunzi, Norio Onisi
  • Patent number: 4587400
    Abstract: A thermal head for a thermal printer and/or a thermal ink transfer printer having a substrate, a heater layer and a conductive lead layer on the substrate in which a protection layer covering the heater layer has been improved. According to the present invention said protection layer is made of polyimide resin which includes some hard particle of filler of S.sub.i C with a weight ratio to the polyimide solid in the range between 1.1 and 3.2. Since the present protection layer is provided with low curing temperature, the substrate of the present thermal head may be polyimide resin which is not heat-proof. Because of filler in the protection layer, that protection layer is wear-proof, although polyimide layer itself is not wear-proof.
    Type: Grant
    Filed: June 22, 1984
    Date of Patent: May 6, 1986
    Assignee: OKI Electric Industry Co., Inc.
    Inventors: Takashi Kanamori, Susumu Shibata, Hideo Sawai, Kenji Kuroki
  • Patent number: 3983801
    Abstract: A high speed printer for printing desired letters, figures, signs, etc., on a paper by depositing ink particles on the paper after properly controlling ink droplets or selectively controlling corpuscles, characterized in that at least one ink mist passage is provided at a location closely adjacent to the surface of ink solution. An air feed port also is provided for introducing air into said ink mist passage after the air passes the ink mist source or its vicinity so that the produced ink mist will flow into said ink mist passage without forming any small convection.
    Type: Grant
    Filed: March 14, 1975
    Date of Patent: October 5, 1976
    Assignee: Oki Electric Industry Co., Inc.
    Inventors: Akinori Watanabe, Katsuhide Tanoshima, Matsusaburo Noguchi
  • Patent number: D296694
    Type: Grant
    Filed: July 23, 1986
    Date of Patent: July 12, 1988
    Assignee: Oki Electric Industry Co., Inc.
    Inventor: Katsuhito Watanabe
  • Patent number: D316870
    Type: Grant
    Filed: November 22, 1988
    Date of Patent: May 14, 1991
    Assignee: Oki Electric Industry Co., Inc.
    Inventors: Kouki Sugawara, Kazuo Yoshida