Abstract: An imaging device includes a photodiode array. The photodiodes include a first set of photodiodes configured as image sensing photodiodes and a second set of photodiodes configured as phase detection auto focus (PDAF) photodiodes. The PDAF photodiodes are arranged in at least pairs in neighboring columns and are interspersed among the image sensing photodiodes. Transfer transistors are coupled to corresponding photodiodes. The transfer transistors coupled to the image sensing photodiodes included in an active row of are controlled in response to a first transfer control signal or a second transfer control signal that control all of the image sensing photodiodes of the active row. A transfer transistor is coupled to one of a pair of the PDAF photodiodes of the active row. The first transfer transistor is controlled in response to a first PDAF control signal that is independent of the first or second transfer control signals.

Abstract: A pixel cell includes a photodiode buried beneath a first side of semiconductor material and coupled to photogenerate image charge in response to incident light. A transfer gate is disposed over the photodiode and includes a vertical transfer gate portion extending a first distance from the first side into the semiconductor material. A floating diffusion region is disposed in the semiconductor material proximate to the transfer gate and is coupled to transfer the image charge from the photodiode toward the first side of the semiconductor material and into the floating diffusion region in response to a transfer control signal. A first pixel transistor having a first gate is disposed over the photodiode proximate to the first side of the semiconductor material. The first gate has a ring structure laterally surrounding the floating diffusion region and the transfer gate at the first side of the semiconductor material.

Abstract: Image sensors include a photodiode formed in a substrate material and a transistor coupled to the photodiode. The transistor has a trench structure formed in the substrate material, an isolation layer disposed on the substrate material, and a gate disposed on the isolation layer and extending into the trench structure. The trench structure has a polygonal cross section in a channel width plane, the polygonal cross section defining at least four sidewall portions of the substrate material, which contribute to an effective channel width measured in the channel width plane that is wider than a planar channel width of the transistor.

Abstract: A pixel circuit includes a photodiode, a floating diffusion, and a conduction gate channel of a multi-gate transfer block disposed in a semiconductor material layer. The multi-gate transfer block is coupled to the photodiode, the floating diffusion, and an overflow capacitor. The multi-gate transfer block also includes first, second, and third gates that are disposed proximate to the single conduction gate channel region. The conduction gate channel is a single region shared among the first, second, and third gates. Overflow image charge generated in the photodiode leaks from the photodiode into the conduction gate channel to the overflow capacitor in response to the first gate, which is coupled between the photodiode and the conduction gate channel, receiving a first gate OFF signal and the second gate, which is coupled between the conduction gate channel and the overflow capacitor, receiving a second gate ON signal.

Abstract: Image sensors capable of dark current calibration and associated circuits are disclosed herein. The method for calibrating dark current includes acquiring at least one dark current frame of a first plurality of pixels of a pixel array of the image sensor. The dark current frame contains readings of individual dark currents for the corresponding pixels obtained during an exposure period when a transistor is turned on disabling the photodiode. The method also includes acquiring at least one normal frame of a second plurality of pixels of the pixel array of the image sensor. The normal frame contains readings of individual signals for the corresponding pixels obtained during the exposure period when the transistor is turned OFF. The method includes subtracting the at least one dark current frame from the at least one normal frame.

Abstract: Image sensors having reduced dark current and white pixel are disclosed herein. In one embodiment, each pixel of the image sensor includes a photodiode (PD), a first floating diffusion (FD1) coupled to the photodiode through a transfer (TX) transistor, a second floating diffusion (FD2) coupled to the FD1 through a dual floating diffusion (DFD) transistor, and a lateral overflow integrating capacitor (LOFIC) coupled between the FD2 and a variable reference voltage (VCAP). A method for a correlated double sampling (CDS) readout includes: exposing a photodiode (PD) to light during an exposure period and increasing a capacitance of the LOFIC by setting the VCAP to a high voltage (H) level during an integration period of the exposure period.

Abstract: Low noise silicon-germanium (SiGe) image sensor. In one embodiment, an image sensor includes a plurality of pixels arranged in rows and columns of a pixel array disposed in a semiconductor substrate. The photodiodes of an individual pixel are configured to receive an incoming light through an illuminated surface of the semiconductor substrate. The semiconductor substrate includes a first layer of semiconductor material having silicon (Si); and a second layer of semiconductor material having silicon germanium (Si1-xGex). A concentration x of Ge changes gradually through at least a portion of thickness of the second layer. Each photodiode includes a first doped region extending through the first layer of semiconductor material and the second layer of semiconductor material; and a second doped region extending through the first layer of semiconductor material and the second layer of semiconductor material.

Abstract: A pixel cell includes a photodiode disposed in a pixel cell region and proximate to a front side of a semiconductor layer to generate image charge in response to incident light directed through a backside to the photodiode. A cell deep trench isolation (CDTI) structure is disposed in the pixel cell region along an optical path of the incident light to the photodiode and proximate to the backside. The CDTI structure includes a central portion extending a first depth from the backside towards the front side. Planar outer portions extend laterally outward from the central portion. The planar output portions further extend a second depth from the backside towards the front side. The first depth is greater than the second depth. Planes formed by each of the planar outer portions intersect in a line coincident with a longitudinal center line of the central portion of the CDTI structure.

Abstract: A lens-array imager includes lenses Lm forming a lens array having a pitch dx, a pixel array including pixel-array regions Rm, and apertured baffle-layers therebetween; m={0, 1, 2, . . . }. Each pixel-array region has a width rx<dx and pitch px<dx. Each apertured baffle-layer is at a respective distance zk from the pixel array and has a respective plurality of aperture stops Am forming an aperture-stop array. A center of each aperture stop Am is collinear with both a center of region Rm and an optical center of lens Lm. Each aperture-stop array has a pitch that approaches px as zk approaches zero and approaches lens pitch dx as zk approaches a distance zL between lens L0 and region R0. A width of each aperture stop Am has an upper limit that increases from px, when zk equals zero, to Wx when distance zk equals zL.

Abstract: Image sensors include a substrate material having a plurality of small photodiodes (SPDs) and a plurality of large photodiodes (LPDs) disposed therein. A plurality of pixel isolators is formed in the substrate material, each pixel isolator being disposed between one of the SPDs and one of the LPDs. A passivation layer is disposed on the substrate material and a buffer layer is disposed on the passivation layer. A plurality of first metal elements is disposed in the buffer layer, each first metal element being disposed over one of the pixel isolators, and a plurality of second metal elements is disposed over the plurality of first metal elements.

Abstract: An image sensor pixel array comprises a plurality of image pixel units to gather image information and a plurality of phase detection auto-focus (PDAF) pixel units to gather phase information. Each of the PDAF pixel units includes two of first image sensor pixels covered by two micro-lenses, respectively. Each of the image pixel units includes four of second image sensor pixels adjacent to each other, wherein each of the second image sensor pixels is covered by an individual micro-lens. A coating layer is disposed on the micro-lenses and forms a flattened surface across the whole image sensor pixel array. A PDAF micro-lens is formed on the coating layer to cover the first image sensor pixels.

Abstract: An image sensor includes a substrate. An array of photodiodes is disposed in the substrate. A plurality of spacers is arranged in a spacer pattern. At least one spacer of the plurality of spacers has an aspect ratio of 18:1 or greater. A buffer layer is disposed between the substrate and the spacer pattern. An array of color filters is disposed in the spacer pattern.

Abstract: A pixel includes a semiconductor substrate, a photodiode region, a floating diffusion region, and a dielectric layer. The substrate has a top surface forming a trench lined by the dielectric layer, and having a trench depth relative to a planar region of the top surface. The photodiode region is in the substrate and includes a bottom photodiode section beneath the trench and a top photodiode section adjacent to the trench, adjoining the bottom photodiode section, and extending toward the planar region to a photodiode depth less than the trench depth. The floating diffusion region is adjacent to the trench and has a junction depth less than the trench depth. A top region of the dielectric layer is between the planar region and the junction depth. A bottom region of the dielectric layer is between the photodiode depth and the trench depth, and thicker than the top region.

Abstract: A shallow trench isolation (STI) structure and method of fabrication includes a two-step epitaxial growth process. A trench larger than the target STI structure is etched into a semiconductor substrate, a first layer of un-doped semiconductor material epitaxially grown in the trench to provide an STI structure having a target depth and a critical dimension, and a second layer of doped semiconductor material epitaxially grown on the first layer, said second layer filling the trench and forming a protrusion above the front-side of the semiconductor substrate.

Abstract: A pixel cell readout circuit includes an amplifier and a capacitor switch circuit that includes a first routing path coupled to an input of the amplifier. A second routing path includes switches coupled in series along the second routing path. A first end of the second routing path is coupled to a bitline. A second end of the second routing path is coupled to an output of the amplifier. Only one of the switches is turned off and a remainder of the switches are turned on. Capacitors are coupled in parallel between the first routing path and the second routing path. A first end of each of the capacitors is coupled to the first routing path. A second end of each of the capacitors is coupled to the second routing path. The switches are interleaved among the second ends of the capacitors along the second routing path.

Abstract: An image sensor includes a substrate material, an array of the color filters, an array of waveguides and spacers. The substrate material includes a plurality of photodiodes disposed therein. The array of color filters are disposed over the substrate material. The array of waveguides are disposed over the substrate material. The buffer layer is disposed between the substrate material and the arrays of color filters and waveguides. The spacers are disposed between the color filters in the array of color filters. The spacers are disposed between the waveguides in the array of waveguides. Incident light is adapted to be confined between the spacers. The incident light is adapted to be directed through one of the waveguides and through one of the color filters prior to being directed through the buffer layer into one of the photodiodes in the substrate material.

Abstract: An imaging device includes groupings of photodiodes having four photodiodes. A transfer transistor is between each photodiode and a floating diffusion. Each floating diffusion is coupled to up to two photodiodes per grouping at a time through transfer transistors. A buffer transistor is coupled to each floating diffusion. The buffer transistors may be in a first or second grouping of buffer transistors. A first bit line is coupled to up to two buffer transistors of the first grouping and a second bit line is coupled to up to two buffer transistors of the second grouping of buffer transistors at a time. A color filter array including a plurality of groupings of color filters is disposed over respective photodiodes of the photodiode array, wherein each grouping of color filters includes four color filters having a same color, wherein each grouping of color filters overlaps two groupings of photodiodes.

Abstract: A method of fabricating a target shallow trench isolation (STI) structure between devices in a wafer-level image sensor having a large number of pixels includes etching a trench, the trench having a greater depth and width than a target STI structure and epitaxially growing the substrate material in the trench for a length of time necessary to provide the target depth and width of the isolation structure. An STI structure formed in a semiconductor substrate includes a trench etched in the substrate having a depth and width greater than that of the STI structure, and semiconductor material epitaxially grown in the trench to provide a critical dimension and target depth of the STI structure. An image sensor includes a semiconductor substrate, a photodiode region, a pixel transistor region and an STI structure between the photodiode region and the pixel transistor region.

Abstract: A pixel includes a semiconductor substrate, an upper surface thereof forming a trench having a trench depth relative to a planar region of the upper surface surrounding the trench, and in a plane perpendicular to the planar region; an upper width between the planar region and an upper depth that is less than the trench depth; and a lower width, between the upper depth and the trench depth, that is less than the upper width. A floating diffusion region adjacent to the trench extends away from the planar region to a junction depth exceeding the upper depth and is less than the trench depth. The photodiode region in the substrate includes a lower photodiode section beneath the trench and an upper photodiode section adjacent to the trench, beginning at a photodiode depth that is less than the trench depth, extending toward and adjoining the lower photodiode section.

Abstract: A structure light module comprises: a VCSEL substrate comprising a VCSEL array comprising a plurality of individual VCSELs; a first spacer disposed on the VCSEL substrate; a first wafer level lens comprising a glass substrate and at least a replicated lens on a first surface of the glass substrate disposed on the first spacer; a FOE disposed on the first wafer level lens; a second spacer disposes on the FOE; a second wafer level lens comprising a glass substrate and at least a replicated lens on a first surface of the glass substrate disposed on the second spacer; a third spacer disposed on the second wafer level lens; a DOE disposed on the third spacer, where a structure light is projected from the DOE on a target surface for 3D imaging.