Abstract: A capacitive touch panel has a plurality of first conductor lines and a plurality of second conductor lines. The first conductor lines are disposed in a first direction for sensing a contact with an object. The second conductor lines are disposed in a second direction to be intersected insulatively with the first conductor lines so as to define an overlapping region at each intersection of a first conductor line and a second conductor line. As a driving signal is applied to one of the second conductor lines, the overlapping region defined at the intersection forms a capacitance. Each of the first conductor lines defines at least one opening in each of the overlapping regions.
Abstract: A sensing circuit of a capacitive touch panel includes a first switch, a second switch, a third switch, a feedback capacitor, a fourth switch and an operation amplifier. The first switch and the second switch have respective first ends connected with a receiving electrode. The third switch has a first end connected with a second end of the first switch. The feedback capacitor has a first end connected with the second end of the first switch. The fourth switch has a first end connected with a second end of the feedback capacitor. The operation amplifier has a positive input terminal connected with a ground terminal, a negative input terminal connected with the fourth switch, and an output terminal connected with the second, third and fourth switches. These switches are controlled during a driving cycle of the driving signal, so that an output voltage is outputted from the operation amplifier.
Abstract: A touch panel sensing circuit senses a voltage variation of a coupling capacitor formed between a first directional signal line and a second directional signal line separated from the first directional signal line by a dielectric when an object approaches. The sensing circuit eliminates the parasitic capacitance effect on the signal lines and rapidly accumulates charges for an amplifier in sensing to thereby increase the operational speed of the sensing circuit.
Abstract: A sensing circuit of a capacitive touch panel includes an operation amplifier, a first switch, a second switch, first and second feedback capacitors, a third switch, a fourth switch, a fifth switch and a sixth switch. The operation amplifier includes a positive input terminal, a negative input terminal and an output terminal. A reference voltage is inputted into the positive input terminal. The first switch is connected between a receiving electrode and the negative input terminal. The second switch is connected between the negative input terminal and the output terminal. The third switch is connected to the negative input terminal and the first feedback capacitor. The fourth switch is connected to the first feedback capacitor and the output terminal. The fifth switch is connected to the negative input terminal and the second feedback capacitor. The sixth switch is connected to the second feedback capacitor and the output terminal.
Abstract: A method for driving a display panel is provided. The display panel includes a first scan line, and the first scan line includes sub-pixels. A first portion of the sub-pixels is controlled by a first gate line, and a second portion of the sub-pixels is controlled by a second gate line. The arrangement of the sub-pixels of the first portion and the second portion are in an interlaced arrangement. The method includes the following steps. First, drive the first gate line and then drive the second gate line in a first image duration. Then, drive the second gate line and then drive the first gate line in a second image duration.
Abstract: An SRAM compatible embedded DRAM system with hidden refresh and dual port capabilities includes a memory cell array comprised of a plurality of single-port memory cells with dual-port capability, a first and a second port access units connected to the memory cell array in order to access the memory cells, and an access arbiter connected to the first and the second port access units in order to arbitrate a first port access request, a second port access request and a hidden refresh request.
Abstract: An output stage circuit is disclosed, which includes a first PMOS transistor, a second PMOS transistor, a first NMOS transistor, and a second NMOS transistor. By using twin-well CMOS transistors and a specific circuit configuration, the invention supports a HALF AVDD structure, reduces power consumption and saves the cost of triple-well CMOS process.
Abstract: The present invention relates to a memory repair circuit and a repairable pseudo-dual port static random access memory (pseudo-dual port SRAM). The memory repair circuit uses fewer redundant column blocks and stores a few failed block addresses to reduce the required complexity of decoding the redundant column blocks. Thus, the present invention can reduce a layout area required by redundant memory cells.
Abstract: A method for stabling a voltage, a pulse frequency modulating circuit and a power supply using the same are provided. The method includes the following steps. First, a comparing signal is provided. Then, set the comparing signal to be a first logic state when the voltage to be stabilized is lower than a preset voltage. Next provide a pulse signal when the comparing signal is set in the first logic state. Afterwards, adjust the enable time of the pulse signal based on the number of times of logic state changing of the comparing signal within a preset period and, adjust the voltage according to the enable time of the pulse signal.
Type:
Grant
Filed:
April 19, 2007
Date of Patent:
December 29, 2009
Assignee:
Orise Technology Co., Ltd.
Inventors:
Yen-Lin Huang, Kuei-Kai Chang, Ming-Chien Li
Abstract: A rail-to-rail class-AB operational amplifier includes a first differential pair unit for receiving a pair of differential signals and generating a first control signal; a second differential pair unit for receiving the pair of differential signals and generating a second control signal; and an output stage for receiving the first control signal and the second control signal and then generating an output voltage. The first differential pair unit includes a first active load, a first transistor differential pair and a first current source. The second differential pair unit includes a second current source, a second transistor differential pair and a second active load.
Abstract: A method for driving a display panel is provided. The display panel includes a first scan line, and the first scan line includes sub-pixels. A first portion of the sub-pixels is controlled by a first gate line, and a second portion of the sub-pixels is controlled by a second gate line. The arrangement of the sub-pixels of the first portion and the second portion are in an interlaced arrangement. The method includes the following steps. First, drive the first gate line and then drive the second gate line in a first image duration. Then, drive the second gate line and then drive the first gate line in a second image duration.
Abstract: A method for stabling a voltage, a pulse frequency modulating circuit and a power supply using the same are provided. The method includes the following steps. First, a comparing signal is provided. Then, set the comparing signal to be a first logic state when the voltage to be stabilized is lower than a preset voltage. Next provide a pulse signal when the comparing signal is set in the first logic state. Afterwards, adjust the enable time of the pulse signal based on the number of times of logic state changing of the comparing signal within a preset period and, adjust the voltage according to the enable time of the pulse signal.
Type:
Application
Filed:
April 19, 2007
Publication date:
September 11, 2008
Applicant:
ORISE TECHNOLOGY CO., LTD.
Inventors:
Yen-Lin Huang, Kuei-Kai Chang, Ming-Chien Li