Patents Assigned to Pacific Solar Pty Ltd.
  • Patent number: 6518596
    Abstract: A simple thin film provided on a substrate which supports a semiconductor device structure, over which is formed a dielectric barrier and a composite metal film contact structure. Contacts are formed by creating holes in the dielectric barrier at locations where contact to an upper region of the semiconductor material is required, and then forming a first metal film extending into the holes to contact a top region of the semiconductor structure. A second set of holes are created to expose an underlying opposite polarity region. Surfaces at the second holes are doped and a second metal film is formed to contact the underlying semiconductor region. The metal structure is then scribed to isolate the contacts to the upper and lower semiconductor regions.
    Type: Grant
    Filed: May 6, 2002
    Date of Patent: February 11, 2003
    Assignee: Pacific Solar Pty Ltd.
    Inventor: Paul Alan Basore
  • Patent number: 5990415
    Abstract: A multilayer solar cell with bypass diodes includes a stack of alternating p and n type semiconductor layers 10, 11, 12, 13, 14 arranged to form a plurality of rectifying photovoltaic junctions 15, 16, 17, 18. Contact is made to underlying layers by way of a buried contact structure comprising grooves extending down through all of the active layers, the walls of each groove being doped 33, 34 with n-or p-type impurities depending upon the layers to which the respective contact is to be connected and the grooves being filled with metal contact material 31, 32. One or more bypass diodes are provided by increasing the doping levels on either side 10, 13 of one or more portions of the junctions 16 of the cell such that quantum mechanical tunnelling provides a reverse bias characteristic whereby conduction occurs under predetermined reverse bias conditions. Ideally, the doping levels in the bypass diodes is 10.sup.18 atoms/cm.sup.3 or greater and the junction area is small.
    Type: Grant
    Filed: May 29, 1997
    Date of Patent: November 23, 1999
    Assignee: Pacific Solar Pty Ltd
    Inventors: Martin Andrew Green, Stuart Ross Wenham
  • Patent number: 5942050
    Abstract: A semiconductor structure and method of forming the structure, where a supporting substrate or superstrate provides the mechanical strength to support overlying thin active regions. The thin dielectric layer deposited over the substrate or superstrate serves to isolate the deposited layers from the substrate from optical, metallurgical and/or chemical perspectives. A seeding layer is then deposited, the seeding layer being of n-type silicon with appropriate treatments to give the desired large grain size. This layer may be crystallized as it is deposited, or may be deposited in amorphous form and then crystallized with further processing. A stack of alternating polarity layers of amorphous silicon or silicon alloy incorporating n-type or p-type dopants in the alternating layers is then deposited over the seeding layer. Solid phase crystallization is then performed to give the desired grain size of 3 .mu.m or larger which can be achieved by extended heating of the layers at low temperature.
    Type: Grant
    Filed: May 29, 1997
    Date of Patent: August 24, 1999
    Assignee: Pacific Solar Pty Ltd.
    Inventors: Martin Andrew Green, Stuart Ross Wenham, Zhengrong Shi